REMOTE 8-BIT I
2
C AND SMBus LOW-POWER I/O EXPANDER
WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS
SCPS139B – JANUARY 2006 – REVISED OCTOBER 2006
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DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The PCA6107 consists of one 8-bit Configuration (input or output selection), Input Port, Output Port, and Polarity
Inversion (active high) registers. At power on, the I/Os are configured as inputs. However, the system master
can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each input or
output is kept in the corresponding input or output register. The polarity of the Input Port register can be inverted
with the Polarity Inversion register. All registers can be read by the system master.
The system master can reset the PCA6107 in the event of a timeout or other improper operation by asserting a
low in the active-low reset (RESET) input. The power-on reset puts the registers in their default states and
initializes the I
2
C/SMBus state machine. Asserting RESET causes the same reset/initialization to occur without
depowering the part.
The PCA6107 open-drain interrupt (INT) output is activated when any input state differs from its corresponding
Input Port register state and is used to indicate to the system master that an input state has changed.
INT can be connected to the interrupt input of a microcontroller. By sending an interrupt signal on this line, the
remote I/O can inform the microcontroller if there is incoming data on its ports without having to communicate via
the I
2
C bus. Thus, the PCA6107 can remain a simple slave device.
The device outputs (latched) have high-current drive capability for directly driving LEDs. The device has low
current consumption and a high-impedance open-drain output pin, P0.
Three hardware pins (A0, A1, and A2) are used to program and vary the fixed I
2
C address, allowing up to eight
devices to share the same I
2
C bus or SMBus.
TERMINAL FUNCTIONS
TERMINAL
NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
NAME
INT
SCL
SDA
A0
A1
A2
P0
P1
GND
P2
P3
P4
P5
P6
P7
RESET
V
CC
V
CC
DESCRIPTION
Interrupt output. Connect to V
CC
through a pullup resistor.
Serial clock bus. Connect to V
CC
through a pullup resistor.
Serial data bus. Connect to V
CC
through a pullup resistor.
Address input. Connect directly to V
CC
or ground.
Address input. Connect directly to V
CC
or ground.
Address input. Connect directly to V
CC
or ground.
P-port input/output. Open-drain design structure. Connect to V
CC
through a pullup resistor.
P-port input/output. Push-pull design structure.
Ground
P-port input/output. Push-pull design structure.
P-port input/output. Push-pull design structure.
P-port input/output. Push-pull design structure.
P-port input/output. Push-pull design structure.
P-port input/output. Push-pull design structure.
P-port input/output. Push-pull design structure.
Active-low reset input. Connect to V
CC
through a pullup resistor if no active connection is used.
Supply voltage
Supply voltage
2
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