The OPA2683 provides very high power gain on low quies-
cent current levels. When disabled, internal high impedance
nodes discharge slowly which, with the exceptional power
gain provided, give a self powering characteristic that leads
to a slow turn off characteristic. Typical full turn off times to
rated 100µA disabled supply current are 60ms. Turn on times
are very fast—less than 40ns.
b) Minimize the distance (< 0.25") from the power-sup-
ply pins to high-frequency 0.1µF decoupling capaci-
tors. At the device pins, the ground and power-plane
layout should not be in close proximity to the signal I/O
pins. Avoid narrow power and ground traces to minimize
inductance between the pins and the decoupling capaci-
tors. The power-supply connections should always be
decoupled with these capacitors. An optional supply
decoupling capacitor (0.01µF) across the two power
supplies (for bipolar operation) will improve 2nd-har-
monic distortion performance. Larger (2.2µF to 6.8µF)
decoupling capacitors, effective at lower frequency,
should also be used on the main supply pins. These may
be placed somewhat farther from the device and may be
shared among several devices in the same area of the
PC board.
THERMAL ANALYSIS
The OPA2683 will not require external heatsinking for most
applications. Maximum desired junction temperature will set
the maximum allowed internal power dissipation as de-
scribed below. In no case should the maximum junction
temperature be allowed to exceed 150°C.
Operating junction temperature (TJ) is given by TA + PD • θJA.
The total internal power dissipation (PD) is the sum of
quiescent power (PDQ) and additional power dissipated in the
output stage (PDL) to deliver load power. Quiescent power is
simply the specified no-load supply current times the total
supply voltage across the part. PDL will depend on the
required output signal and load but would, for a grounded
resistive load, be at a maximum when the output is fixed at
a voltage equal to 1/2 of either supply voltage (for equal
c) Careful selection and placement of external compo-
nents will preserve the high-frequency performance
of the OPA2683. Resistors should be a very low reac-
tance type. Surface-mount resistors work best and allow
a tighter overall layout. Metal film and carbon composi-
tion axially-leaded resistors can also provide good high-
frequency performance. Again, keep their leads and
PCB trace length as short as possible. Never use
wirewound type resistors in a high-frequency applica-
tion. Since the output pin and inverting input pin are the
most sensitive to parasitic capacitance, always position
the feedback and series output resistor, if any, as close
as possible to the output pin. Other network compo-
nents, such as noninverting input termination resistors,
should also be placed close to the package. The fre-
quency response is primarily determined by the feed-
back resistor value as described previously. Increasing
its value will reduce the peaking at higher gains, while
decreasing it will give a more peaked frequency re-
sponse at lower gains. The 800Ω feedback resistor used
in the Electrical Characteristics at a gain of +2 on ±5V
supplies is a good starting point for design. Note that a
953Ω feedback resistor, rather than a direct short, is
required for the unity-gain follower application. A cur-
rent-feedback op amp requires a feedback resistor even
in the unity-gain follower configuration to control stability.
2
bipolar supplies). Under this condition PDL = VS /(4 • RL)
where RL includes feedback network loading.
Note that it is the power in the output stage and not into the
load that determines internal power dissipation.
As an absolute worst-case example, compute the maximum
TJ using an OPA2683IDCN (SOT23-8 package) in the circuit
of Figure 1 operating at the maximum specified ambient
temperature of +85°C with both outputs driving a grounded
100Ω load to 2.5VDC
.
PD = 10V • 2.1mA + 2 • (52 /(4 • (100Ω || 1.9kΩ))) = 153mW
Maximum TJ = +85°C + (0.153W • 150°C/W) = 108°C
This maximum operating junction temperature is well below
most system level targets. Most applications will be lower
than this since an absolute worst-case output stage power in
both channels simultaneously was assumed in this calculation.
BOARD LAYOUT GUIDELINES
Achieving optimum performance with a high-frequency am-
plifier like the OPA2683 requires careful attention to board
layout parasitics and external component types. Recommen-
dations that will optimize performance include:
a) Minimize parasitic capacitance to any AC ground for
all of the signal I/O pins. Parasitic capacitance on the
output and inverting input pins can cause instability; on
the noninverting input, it can react with the source
impedance to cause unintentional bandlimiting. To re-
duce unwanted capacitance, a window around the sig-
nal I/O pins should be opened in all of the ground and
power planes around those pins. Otherwise, ground and
power planes should be unbroken elsewhere on the
board.
OPA2683
SBOS244H
23
www.ti.com
TI [ TEXAS INSTRUMENTS ]
