The total output spot noise voltage can be computed as the
square root of the sum of all squared output noise voltage
contributors. Equation 4 shows the general form for the
output noise voltage using the terms presented in Figure 14.
While the last term, the inverting bias current error, is
dominant in this low-gain circuit, the input offset voltage will
become the dominant DC error term as the gain exceeds
5V/V. Where improved DC precision is required in a high-
speed amplifier, consider the OPA656 single and OPA2822
dual voltage-feedback amplifiers.
(4)
2
2
2
EO
=
ENI + IBNRS + 4kTRS NG2 + I R
+ 4kTRFNG
(
)
(
)
BI
F
DISABLE OPERATION
Dividing this expression by the noise gain (NG = (1 + RF/RG))
will give the equivalent input referred spot noise voltage at
the noninverting input, as shown in Equation 5.
The OPA2683 provides an optional disable feature that may
be used to reduce system power when channel operation is
not required. If the VDIS control pin is left unconnected, the
OPA2683 will operate normally. To disable, the control pin
must be asserted LOW. Figure 14 shows a simplified internal
circuit for the disable control feature.
(5)
2
IBIRF
NG
4kTRF
NG
2
2
EN
=
ENI + IBNRS + 4kTRS
+
+
(
)
+VS
Evaluating these two equations for the OPA2683 circuit and
component values (see Figure 1) will give a total output spot
noise voltage of 15.2nV/√Hz and a total equivalent input spot
noise voltage of 7.6nV/√Hz. This total input referred spot
noise voltage is higher than the 4.4nV/√Hz specification for
the op amp voltage noise alone. This reflects the noise
added to the output by the inverting current noise times the
feedback resistor. As the gain is increased, this fixed output
noise power term contributes less to the total output noise
and the total input referred voltage noise given by Equation 5
will approach just the 4.4nV/√Hz of the op amp itself. For
example, going to a gain of +20 in the circuit of Figure 1,
adjusting only the gain resistor to 50Ω, will give a total input
referred noise of 4.6nV/√Hz. A more complete description of
op amp noise analysis can be found in TI application note
AB-103, Noise Analysis for High-Speed Op Amps (SBOA066),
located at www.ti.com.
40kΩ
Q1
25kΩ
250kΩ
IS
VDIS
Control
–VS
FIGURE 14. Simplified Disable Control Circuit.
In normal operation, base current to Q1 is provided through
the 250kΩ resistor while the emitter current through the 40kΩ
resistor sets up a voltage drop that is inadequate to turn on
the two diodes in Q1’s emitter. As VDIS is pulled LOW,
additional current is pulled through the 40kΩ resistor eventu-
ally turning on these two diodes (≈ 33µA). At this point, any
further current pulled out of VDIS goes through those diodes
holding the emitter-base voltage of Q1 at approximately 0V.
This shuts off the collector current out of Q1, turning the
amplifier off. The supply current in the disable mode are only
those required to operate the circuit of Figure 14.
DC ACCURACY AND OFFSET CONTROL
A current-feedback op amp like the OPA2683 provides
exceptional bandwidth in high gains, giving fast pulse settling
but only moderate DC accuracy. The Electrical Characteris-
tics show an input offset voltage comparable to high slew
rate voltage-feedback amplifiers. The two input bias currents,
however, are somewhat higher and are unmatched. Whereas
bias current cancellation techniques are very effective with
most voltage-feedback op amps, they do not generally re-
duce the output DC offset for wideband current-feedback op
amps. Since the two input bias currents are unrelated in both
magnitude and polarity, matching the source impedance
looking out of each input to reduce their error contribution to
the output is ineffective. Evaluating the configuration of
Figure 1, using worst-case +25°C input offset voltage and the
two input bias currents, gives a worst-case output offset
range equal to:
When disabled, the output and input nodes go to a high
impedance state. If the OPA2683 is operating in a gain of +1
(with a 1.2kΩ feedback resistor still required for stability), this
will show a very high impedance (1.7pF || 1MΩ) at the output
and exceptional signal isolation. If operating at a gain greater
than +1, the total feedback network resistance (RF + RG) will
appear as the impedance looking back into the output, but
the circuit will still show very high forward and reverse
isolation. If configured as an inverting amplifier, the input and
output will be connected through the feedback network
resistance (RF + RG) giving relatively poor input to output
isolation.
±(NG • VOS) + (IBN • RS /2 • NG) ± (IBI • RF)
where NG = noninverting signal gain
= ±(2 • 3.5mV) ± (4.5µA • 25Ω • 2) ± (953Ω • 10mA)
= ±7.0mV + 0.23mV ± 9.5mV
= ±16.73mV
OPA2683
SBOS244H
22
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TI [ TEXAS INSTRUMENTS ]
