OMAP-L137 Low-Power Applications Processor
SPRS563A–SEPTEMBER 2008–REVISED OCTOBER 2008
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Table 6-78. LCD LIDD Mode Timing Characteristics (continued)
NO
PARAMETER
MIN
MAX
UNIT
Delay time, LCD_MCLK ↑ to
LCD_HSYNC↓
10
td(LCD_W_A)
0
7
ns
Delay time, LCD_MCLK ↑ to
LCD_HSYNC↑
11
12
13
14
td(LCD_W_I)
0
0
0
0
7
7
7
7
ns
ns
ns
ns
Delay time, LCD_MCLK ↑ to
LCD_PCLK↑
td(LCD_STRB_A)
td(LCD_STRB_I)
td(LCD_D_Z)
Delay time, LCD_MCLK ↑ to
LCD_PCLK↓
Delay time, LCD_MCLK ↑ to
LCD_D[15:0] in 3-state
Delay time, LCD_MCLK ↑ to 15
td(Z_LCD_D) 3-state) LCD_D[15:0]
(valid from 3-state)
15
td(Z_LCD_D)
0
7
ns
CS_DELAY
(0 to 3)
1
2
R_SU
(0 to 31)
R_HOLD
(1 to 15)
W_SU
(0 to 31)
W_STROBE
CS_DELAY
(0 to 3)
R_STROBE
(1 to 63)
W_HOLD
3
(1 to 63)
(1 to 15)
LCD_MCLK
4
5
14
17
16
15
LCD_D[15:0]
LCD_PCLK
Write Data
Data[7:0]
Read Status
Not Used
RS
8
9
LCD_VSYNC
LCD_HSYNC
10
11
R/W
12
12
13
13
E0
E1
LCD_AC_ENB_CS
Figure 6-46. Character Display HD44780 Write
174
Peripheral Information and Electrical Specifications
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