ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢆꢇ ꢄꢆꢈ ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇ ꢃ ꢆꢈ ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇ ꢃꢆ ꢇ
ꢀ ꢉ ꢊ ꢋꢌ ꢁꢉ ꢍꢎ ꢏ ꢐ ꢀꢉ ꢑ ꢒꢓꢑ ꢓꢎ ꢔꢒ ꢓꢐ ꢐꢋ ꢒ
SLAS272F − JULY 2000 − REVISED JUNE 2004
APPLICATION INFORMATION
input/output schematic (continued)
port P5, P5.3, input/output with Schmitt-trigger
P5SEL.3
0: Input
1: Output
0
1
0
1
SYNC
MM
P5DIR.3
DCM_SIMO
Pad Logic
STC
STE
P5.3/UCLK1
P5OUT.3
UCLK1
From USART1
P5IN.3
EN
D
UCLK1
To USART1
NOTE: UART mode:
The UART clock can only be an input. If UART mode and UART function are selected, the P5.3/UCLK1 direction
is always input.
SPI, slave mode:
The clock applied to UCLK1 is used to shift data in and out.
SPI, master mode: The clock to shift data in and out is supplied to connected devices on pin P5.3/UCLK1 (in slave mode).
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