ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢆꢇ ꢄꢆꢈ ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇ ꢃ ꢆꢈ ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇ ꢃꢆ ꢇ
ꢀ ꢉ ꢊ ꢋꢌ ꢁꢉ ꢍꢎ ꢏ ꢐ ꢀꢉ ꢑ ꢒꢓꢑ ꢓꢎ ꢔꢒ ꢓꢐ ꢐꢋ ꢒ
SLAS272F − JULY 2000 − REVISED JUNE 2004
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
SCHMITT-trigger inputs − Ports P1, P2, P3, P4, P5, and P6
PARAMETER
TEST CONDITIONS
MIN
1.1
TYP
MAX
1.5
1.9
0.9
1.3
1.1
1
UNIT
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2.2 V
= 3 V
V
IT+
V
IT−
V
hys
Positive-going input threshold voltage
V
1.5
= 2.2 V
= 3 V
0.4
Negative-going input threshold voltage
V
V
0.90
0.3
= 2.2 V
= 3 V
Input voltage hysteresis (V
IT+
− V )
IT−
0.5
standard inputs − RST/NMI; JTAG: TCK, TMS, TDI/TCLK, TDO/TDI
PARAMETER
Low-level input voltage
High-level input voltage
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
V
V
V
SS
V
+0.6
SS
IL
V
CC
= 2.2 V / 3 V
0.8×V
V
CC
V
IH
CC
inputs Px.x, TAx, TBx
PARAMETER
TEST CONDITIONS
V
CC
MIN
TYP
MAX
UNIT
2.2 V/3 V
2.2 V
1.5
62
50
62
cycle
Port P1, P2: P1.x to P2.x, external trigger signal
for the interrupt flag, (see Note 1)
t
External interrupt timing
(int)
ns
3 V
TA0, TA1, TA2
2.2 V
Timer_A, Timer_B capture
timing
t
ns
(cap)
TB0, TB1, TB2, TB3, TB4, TB5, TB6 (see
Note 2)
3 V
50
Timer_A, Timer_B clock
frequency externally applied
to pin
f
f
2.2 V
3 V
8
(TAext)
TACLK, TBCLK, INCLK: t
= t
MHz
MHz
(H) (L)
10
(TBext)
f
f
2.2 V
3 V
8
(TAint)
Timer_A, Timer_B clock
frequency
SMCLK or ACLK signal selected
10
(TBint)
NOTES: 1. The external signal sets the interrupt flag every time the minimum t
(int)
cycle and time parameters are met. It may be set even with
is measured in
trigger signals shorter than t
MCLK cycles.
. Both the cycle and timing specifications must be met to ensure the flag is set. t
(int)
(int)
2. Seven capture/compare registers in ’x14x(1) and three capture/compare registers in ’x13x.
leakage current (see Note 1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
I
I
I
Port P1
Port P2
Port P6
V
V
V
(see Note 2)
50
50
50
lkg(P1.x)
lkg(P2.x)
lkg(P6.x)
(P1.x)
Leakage
current (see
Note 1)
V
(see Note 2)
V
CC
= 2.2 V/3 V
nA
(P2.3) (P2.4)
(see Note 2)
(P6.x)
NOTES: 1. The leakage current is measured with V
SS
or V
CC
applied to the corresponding pin(s), unless otherwise noted.
2. The port pin must be selected as input and there must be no optional pullup or pulldown resistor.
26
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