MSP430F41x2
MIXED SIGNAL MICROCONTROLLER
SLAS648E -- APRIL 2009 -- REVISED MARCH 2011
memory organization
MSP430F4152
MSP430F4132
Memory
Size
16KB
8KB
Main: interrupt vector
Main: code memory
Flash
Flash
0FFFFh -- 0FFE0h
0FFFFh -- 0C000h
0FFFFh -- 0FFE0h
0FFFFh -- 0E000h
Information memory
Boot memory
RAM
Size
Flash
256 Byte
010FFh -- 01000h
256 Byte
010FFh -- 01000h
Size
ROM
1KB
0FFFh -- 0C00h
1KB
0FFFh -- 0C00h
Size
512B
512B
03FFh -- 0200h
03FFh -- 0200h
Peripherals
16-bit
8-bit
8-bit SFR
01FFh -- 0100h
0FFh -- 010h
0Fh -- 00h
01FFh -- 0100h
0FFh -- 010h
0Fh -- 00h
bootstrap loader (BSL)
The MSP430 BSL enables users to program the flash memory or RAM using a UART serial interface. Access
to the MSP430 memory via the BSL is protected by user-defined password. For complete description of the
features of the BSL and its implementation, see the MSP430 Memory Programming User’s Guide, literature
number SLAU265.
BSL FUNCTION
Data transmit
Data receive
PM PACKAGE PINS
53 -- P1.0
RGZ PACKAGE PINS
37 -- P1.0
52 -- P1.1
36 -- P1.1
flash memory (Flash)
The flash memory can be programmed via the JTAG port, the bootstrap loader, or in-system by the CPU. The
CPU can perform single-byte and single-word writes to the flash memory. Features of the flash memory include:
D
Flash memory has n segments of main memory and four segments of information memory (A to D) of
64 bytes each. Each segment in main memory is 512 bytes in size.
D
D
Segments 0 to n may be erased in one step, or each segment may be individually erased.
Segments A to D can be erased individually, or as a group with segments 0 to n.
Segments A to D are also called information memory.
15
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TI [ TEXAS INSTRUMENTS ]
