MSP430G2955
MSP430G2855
MSP430G2755
www.ti.com
SLAS800 –MARCH 2013
Device Pinout, 40-Pin QFN (RHA Package)
39 38 37 36 35 34 33 32
DVSS
XOUT/P2.7
1
2
3
4
5
6
7
8
9
10
30 P1.1/TA0.0
29 P1.0/TA0CLK/ADC10CLK
XIN/P2.6
28 P2.4/TA0.2/A4/VREF+/VEREF+
27 P2.3/TA0.1/A3/VREF−/VEREF−
26 P3.7/TA1.2/A7
DVSS
RST/NMI/SBWTDIO
P2.0/TA1CLK/ACLK/A0
P2.1/TA0INCLK/SMCLK/A1
P2.2/TA0.0/A2
25 P3.6/TA1.1/A6
24 P3.5/UCA0RXD/UCA0SOMI
23 P3.4/UCA0TXD/UCA0SIMO
22 P4.7/TB0CLK/CA7
P3.0/UCB0STE/UCA0CLK/A5
P3.1/UCB0SIMO/UCB0SDA
21 P4.6/TB0OUTH/A15/CA6
12 13 14 15 16 17 18 19
Functional Block Diagram
VCC
VSS
P1.x, P2.x
2x8
P3.x, P4.x
2x8
XIN
XOUT
Ports P1, P2
Ports P3, P4
ADC
10-Bit
ACLK
Flash
RAM
4 kB
COMP_A+
Basic Clock
System+
2x8 I/O,
Interrupt
capability,
Pullup or
pulldown
resistors
2x8 I/O,
Pullup or
pulldown
resistors
56 kB
48 kB
32 kB
SMCLK
12
8
Channels
Channels,
Autoscan,
DTC
MCLK
MAB
16MHz
CPU
incl. 16
Registers
MDB
Emulation
(2BP)
Timer0_B3
USCI_A0:
UART, LIN,
IrDA,SPI
Watchdog
WDT+
Timer1_A3
Timer0_A3
JTAG
Interface
Brownout
Protection
3 CC
3 CC
Registers
3 CC
Registers
Registers,
Shadow
Register
USCI_B0:
SPI,I2C
15 or 16 Bit
Spy-Bi-Wire
RST/NMI
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