MSP430G2x53
MSP430G2x13
SLAS735A
–
APRIL 2011
–
REVISED MAY 2011
Table 2. Terminal Functions (continued)
TERMINAL
NO.
NAME
P3.5/
TA0.1
P3.6/
TA0.2
P3.7/
TA1CLK/
CAOUT
RST/
NMI/
SBWTDIO
TEST/
17
SBWTCK
DVCC
DVSS
NC
QFN Pad
1
20
NA
NA
1
28
NA
NA
29, 30
27, 28
8, 32
Pad
NA
NA
NA
NA
25
24
I
16
24
23
I
-
21
20
I/O
PW20,
N20
-
-
PW28
19
20
RHB32
18
19
I/O
I/O
General-purpose digital I/O
Timer0_A, compare: Out1 output
General-purpose digital I/O
Timer0_A, compare: Out2 output
General-purpose digital I/O
Timer0_A, clock signal TACLK input
Comparator_A+, output
Reset
Nonmaskable interrupt input
Spy-Bi-Wire test data input/output during programming and test
Selects test mode for JTAG pins on Port 1. The device protection fuse is
connected to TEST.
Spy-Bi-Wire test clock input during programming and test
Supply voltage
Ground reference
Not connected
QFN package pad. Connection to VSS is recommended.
I/O
DESCRIPTION
Copyright
©
2011, Texas Instruments Incorporated
7
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