MSP430FR573x
MSP430FR572x
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SLAS639D –JULY 2011–REVISED AUGUST 2012
INPUT/OUTPUT SCHEMATICS
Port P1, P1.0 to P1.2, Input/Output With Schmitt Trigger
Pad Logic
External ADC reference
(P1.0, P1.1)
To ADC
From ADC
To Comparator
From Comparator
CDPD.x
P1REN.x
P1DIR.x
0 0
0 1
1 0
1 1
DVSS
DVCC
0
1
Direction
0: Input
1: Output
1
0 0
0 1
1 0
1 1
P1OUT.x
From module 1
From module 2
DVSS
P1.0/TA0.1/DMAE0/RTCCLK/A0/CD0/VeREF-
P1.1/TA0.2/TA1CLK/CDOUT/A1/CD1/VeREF+
P1.2/TA1.1/TA0CLK/CDOUT/A2/CD2
P1SEL0.x
P1SEL1.x
P1IN.x
Bus
Keeper
EN
D
To modules
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