MSP430FR573x
MSP430FR572x
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SLAS639D –JULY 2011–REVISED AUGUST 2012
Crystal Oscillator, XT1, High-Frequency (HF) Mode (1) (continued)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX UNIT
Integrated effective load
capacitance
CL,eff
XTS = 1
1
pF
(7) (8)
XTS = 1, Measured at ACLK,
fXT1,HF2 = 24 MHz
Duty cycle, HF mode
40
50
60
%
Oscillator fault frequency, HF mode
(10)
fFault,HF
XTS = 1
145
900 kHz
(9)
(7) Includes parasitic bond and package capacitance (approximately 2 pF per pin). Because the PCB adds additional capacitance, it is
recommended to verify the correct load by measuring the ACLK frequency. For a correct setup, the effective load capacitance should
always match the specification of the used crystal.
(8) Requires external capacitors at both terminals. Values are specified by crystal manufacturers. Recommended values supported are 14
pF, 16 pF, and 18 pF. Maximum shunt capacitance of 7 pF.
(9) Frequencies below the MIN specification set the fault flag. Frequencies above the MAX specification do not set the fault flag.
Frequencies in between might set the flag.
(10) Measured with logic-level input frequency but also applies to operation with crystals.
Internal Very-Low-Power Low-Frequency Oscillator (VLO)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
VLO frequency
VLO frequency temperature drift
TEST CONDITIONS
VCC
MIN
TYP
8.3
0.5
4
MAX UNIT
13 kHz
%/°C
fVLO
Measured at ACLK
2 V to 3.6 V
2 V to 3.6 V
2 V to 3.6 V
2 V to 3.6 V
5
(1)
(2)
dfVLO/dT
Measured at ACLK
Measured at ACLK
Measured at ACLK
dfVLO/dVCC VLO frequency supply voltage drift
fVLO,DC Duty cycle
%/V
40
50
60
%
(1) Calculated using the box method: (MAX(-40 to 85°C) – MIN(-40 to 85°C)) / MIN(-40 to 85°C) / (85°C – (–40°C))
(2) Calculated using the box method: (MAX(2.0 to 3.6 V) – MIN(2.0 to 3.6 V)) / MIN(2.0 to 3.6 V) / (3.6 V – 2 V)
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