MSP430FR573x
MSP430FR572x
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SLAS639D –JULY 2011–REVISED AUGUST 2012
(1)
Crystal Oscillator, XT1, Low-Frequency (LF) Mode
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX UNIT
fOSC = 32768 Hz, XTS = 0,
XT1BYPASS = 0, XT1DRIVE = {1},
CL,eff = 9 pF, TA = 25°C,
3 V
60
Additional current consumption
XT1 LF mode from lowest drive
setting
fOSC = 32768 Hz, XTS = 0,
XT1BYPASS = 0, XT1DRIVE = {2},
TA = 25°C, CL,eff = 9 pF
ΔIVCC.LF
3 V
3 V
90
nA
fOSC = 32768 Hz, XTS = 0,
XT1BYPASS = 0, XT1DRIVE = {3},
TA = 25°C, CL,eff = 12 pF
140
XT1 oscillator crystal frequency,
LF mode
fXT1,LF0
XTS = 0, XT1BYPASS = 0
32768
Hz
XT1 oscillator logic-level square-
wave input frequency, LF mode
(2) (3)
fXT1,LF,SW
XTS = 0, XT1BYPASS = 1
10 32.768
210
50 kHz
XTS = 0,
XT1BYPASS = 0, XT1DRIVE = {0},
fXT1,LF = 32768 Hz, CL,eff = 6 pF
Oscillation allowance for
OALF
kΩ
(4)
LF crystals
XTS = 0,
XT1BYPASS = 0, XT1DRIVE = {3},
fXT1,LF = 32768 Hz, CL,eff = 12 pF
300
XTS = 0, Measured at ACLK,
fXT1,LF = 32768 Hz
Duty cycle, LF mode
30
10
70
%
Oscillator fault frequency, LF mode
(6)
fFault,LF
tSTART,LF
CL,eff
XTS = 0
10000
Hz
(5)
fOSC = 32768 Hz, XTS = 0,
XT1BYPASS = 0, XT1DRIVE = {0},
TA = 25°C, CL,eff = 6 pF
1000
(7)
Startup time, LF mode
3 V
ms
pF
fOSC = 32768 Hz, XTS = 0,
XT1BYPASS = 0, XT1DRIVE = {3},
TA = 25°C, CL,eff = 12 pF
1000
1
Integrated effective load
XTS = 0
(8) (9)
capacitance, LF mode
(1) To improve EMI on the XT1 oscillator, the following guidelines should be observed.
(a) Keep the trace between the device and the crystal as short as possible.
(b) Design a good ground plane around the oscillator pins.
(c) Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
(d) Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.
(e) Use assembly materials and praxis to avoid any parasitic load on the oscillator XIN and XOUT pins.
(f) If conformal coating is used, ensure that it does not induce capacitive/resistive leakage between the oscillator pins.
(2) When XT1BYPASS is set, XT1 circuits are automatically powered down. Input signal is a digital square wave with parametrics defined in
the Schmitt-trigger Inputs section of this data sheet.
(3) Maximum frequency of operation of the entire device cannot be exceeded.
(4) Oscillation allowance is based on a safety factor of 5 for recommended crystals. The oscillation allowance is a function of the XT1DRIVE
settings and the effective load. In general, comparable oscillator allowance can be achieved based on the following guidelines, but
should be evaluated based on the actual crystal selected for the application:
(a) For XT1DRIVE = {0}, CL,eff ≤ 6 pF.
(b) For XT1DRIVE = {1}, 6 pF ≤ CL,eff ≤ 9 pF.
(c) For XT1DRIVE = {2}, 6 pF ≤ CL,eff ≤ 10 pF.
(d) For XT1DRIVE = {3}, 6 pF ≤ CL,eff ≤ 12 pF.
(5) Frequencies below the MIN specification set the fault flag. Frequencies above the MAX specification do not set the fault flag.
Frequencies in between might set the flag.
(6) Measured with logic-level input frequency but also applies to operation with crystals.
(7) Includes startup counter of 4096 clock cycles.
(8) Requires external capacitors at both terminals.
(9) Values are specified by crystal manufacturers. Include parasitic bond and package capacitance (approximately 2 pF per pin).
Recommended values supported are 6 pF, 9 pF, and 12 pF. Maximum shunt capacitance of 1.6 pF.
Copyright © 2011–2012, Texas Instruments Incorporated
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