MSP430FR573x
MSP430FR572x
SLAS639D –JULY 2011–REVISED AUGUST 2012
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Peripheral File Map
Table 17. Peripherals
OFFSET ADDRESS
RANGE
MODULE NAME
BASE ADDRESS
Special Functions (see Table 18)
PMM (see Table 19)
0100h
0120h
0140h
0150h
015Ch
0160h
0180h
01B0h
0200h
0220h
0320h
0340h
0380h
03C0h
0400h
0440h
04A0h
04C0h
0500h
0510h
0520h
0530h
05A0h
05C0h
05E0h
0640h
0700h
08C0h
000h-01Fh
000h-010h
000h-00Fh
000h-007h
000h-001h
000h-00Fh
000h-01Fh
000h-001h
000h-01Fh
000h-01Fh
000h-01Fh
000h-02Fh
000h-02Fh
000h-02Fh
000h-02Fh
000h-02Fh
000h-01Fh
000h-02Fh
000h-00Fh
000h-00Ah
000h-00Ah
000h-00Ah
000h-00Fh
000h-01Fh
000h-01Fh
000h-02Fh
000h-03Fh
000h-00Fh
FRAM Control (see Table 20)
CRC16 (see Table 21)
Watchdog (see Table 22)
CS (see Table 23)
SYS (see Table 24)
Shared Reference (see Table 25)
Port P1/P2 (see Table 26)
Port P3/P4 (see Table 27)
Port PJ (see Table 28)
TA0 (see Table 29)
TA1 (see Table 30)
TB0 (see Table 31)
TB1 (see Table 32)
TB2 (see Table 33)
Real-Time Clock (RTC_B) (see Table 34)
32-Bit Hardware Multiplier (see Table 35)
DMA General Control (see Table 36)
DMA Channel 0 (see Table 36)
DMA Channel 1 (see Table 36)
DMA Channel 2 (see Table 36)
MPU Control (see Table 37)
eUSCI_A0 (see Table 38)
eUSCI_A1 (see Table 39)
eUSCI_B0 (see Table 40)
ADC10_B (see Table 41)
Comparator_D (see Table 42)
34
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