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MSP430F6723IPZR 参数 Datasheet PDF下载

MSP430F6723IPZR图片预览
型号: MSP430F6723IPZR
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号微控制器 [MIXED SIGNAL MICROCONTROLLER]
分类和应用: 微控制器和处理器外围集成电路时钟
文件页数/大小: 121 页 / 1013 K
品牌: TI [ TEXAS INSTRUMENTS ]
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MSP430F673x  
MSP430F672x  
SLAS731A DECEMBER 2011REVISED APRIL 2012  
www.ti.com  
SD24_B, Performance (continued)  
fSD24 = 1 MHz, SD24OSRx = 256, SD24REFS = 1  
PARAMETER  
TEST CONDITIONS  
VCC  
3 V  
3 V  
3 V  
MIN  
TYP  
-110  
-110  
-110  
MAX UNIT  
SD24GAIN: 1, fCM = 50 Hz, VCM = 930 mV  
SD24GAIN: 8, fCM = 50 Hz, VCM = 120 mV  
SD24GAIN: 32, fCM = 50 Hz, VCM = 30 mV  
Common mode rejection  
at 50 Hz(8)  
CMRR,50Hz  
AC PSRR,ext  
dB  
SD24GAIN: 1, VCC = 3 V + 50 mV × sin(2π ×  
fVcc × t), fVcc = 50 Hz  
-61  
-77  
-79  
-61  
-77  
-79  
AC power supply  
rejection ratio, external  
reference(9)  
SD24GAIN: 8, VCC = 3 V + 50 mV × sin(2π ×  
fVcc × t), fVcc = 50 Hz  
dB  
dB  
SD24GAIN: 32, VCC = 3 V + 50 mV × sin(2π ×  
fVcc × t), fVcc = 50 Hz  
SD24GAIN: 1, VCC = 3 V + 50 mV × sin(2π ×  
fVcc × t), fVcc = 50 Hz  
AC power supply  
rejection ratio, internal  
reference(9)  
SD24GAIN: 8, VVCC = 3 V + 50 mV × sin(2π ×  
fVcc × t), fVcc = 50 Hz  
AC PSRR,int  
SD24GAIN: 32, VCC = 3 V + 50 mV × sin(2π ×  
fVcc × t), fVcc = 50 Hz  
Crosstalk source: SD24GAIN: 1, Sine-wave  
with max. possible Vpp. fIN = 50 Hz, 100 Hz,  
Converter under test: SD24GAIN: 1  
3 V  
3 V  
3 V  
-120  
-115  
-100  
Crosstalk source: SD24GAIN: 1, Sine-wave  
with max. possible Vpp. fIN = 50 Hz, 100 Hz,  
Converter under test: SD24GAIN: 8  
Crosstalk between  
converters(10)  
XT  
dB  
Crosstalk source: SD24GAIN: 1, Sine-wave  
with max. possible Vpp. fIN = 50 Hz, 100 Hz,  
Converter under test: SD24GAIN: 32  
(8) The AC CMRR is the difference between a hypothetical signal with the amplitude and frequency of the applied common mode ripple  
applied to the inputs of the ADC and the actual common mode signal spur visible in the FFT spectrum:  
AC CMRR = Error Spur [dBFS] - 20log(VCM/1.2V/G) [dBFS] with a common mode signal of VCM × sin(2π × fCM × t) applied to the analog  
inputs.  
The AC CMRR is measured with the both inputs connected to the common mode signal i.e. no differential input signal is applied.  
With the specified typical values the error spur is within the noise floor (as specified by the SINAD values).  
(9) The AC PSRR is the difference between a hypothetical signal with the amplitude and frequency of the applied supply voltage ripple  
applied to the inputs of the ADC and the actual supply ripple spur visible in the FFT spectrum:  
AC PSRR = Error Spur [dBFS] - 20log(50 mV / 1.2 V / G) [dBFS] with a signal of 50 mV × sin(2π × fVcc × t) added to VCC  
The AC PSRR is measured with the inputs grounded; that is, no analog input signal is applied.  
With the specified typical values the error spur is within the noise floor (as specified by the SINAD values).  
SD24GAIN: 1 Hypothetical signal: 20log(50 mV / 1.2 V / 1) = -27.6 dBFS  
.
SD24GAIN: 8 Hypothetical signal: 20log(50 mV / 1.2 V / 8) = -9.5 dBFS  
SD24GAIN: 32 Hypothetical signal: 20log(50 mV / 1.2 V / 32) = 2.5 dBFS  
(10) The crosstalk XT is specified as the tone level of the signal applied to the crosstalk source seen in the spectrum of the converter under  
test. It is measured with the inputs of the converter under test being grounded.  
74  
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