MSP430F673x
MSP430F672x
SLAS731A –DECEMBER 2011–REVISED APRIL 2012
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10-Bit ADC, Timing Parameters
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX UNIT
For specified performance of ADC10_A linearity
parameters
fADC10CLK
fADC10OSC
2.2 V, 3 V
0.45
5
5.5 MHz
Internal ADC10_A
oscillator(1)
ADC10DIV = 0, fADC10CLK = fADC10OSC
2.2 V, 3 V
2.2 V, 3 V
4.4
2.4
5.0
5.6 MHz
REFON = 0, Internal oscillator, 12 ADC10CLK
cycles, 10-bit mode
fADC10OSC = 4 MHz to 5 MHz
3.0
µs
tCONVERT
Conversion time
External fADC10CLK from ACLK, MCLK or SMCLK,
(2)
ADC10SSEL ≠ 0
Turn on settling time of
the ADC
(3)
tADC10ON
tSample
See
100
ns
RS = 1000 Ω, RI = 96 kΩ, CI = 3.5 pF(4)
RS = 1000 Ω, RI = 36 kΩ, CI = 3.5 pF(4)
1.8 V
3 V
3
1
µs
µs
Sampling time
(1) The ADC10OSC is sourced directly from MODOSC inside the UCS.
(2) 12 × ADC10DIV × 1/fADC10CLK
(3) The condition is that the error in a conversion started after tADC10ON is less than ±0.5 LSB. The reference and input signal are already
settled.
(4) Approximately eight Tau (t) are needed to get an error of less than ±0.5 LSB
78
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