MSP430F663x
SLAS566C –JUNE 2010–REVISED AUGUST 2012
www.ti.com
REF, Built-In Reference (continued)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX UNIT
AVCC = AVCC(min) - AVCC(max)
,
REFVSEL = {0, 1, 2}, REFOUT = 0,
REFON = 0 → 1
75
Settling time of reference
voltage(8)
tSETTLE
µs
AVCC = AVCC(min) - AVCC(max)
,
CVREF = CVREF(max),
REFVSEL = {0, 1, 2}, REFOUT = 1,
75
REFON = 0 → 1
(8) The condition is that the error in a conversion started after tREFON is less than ±0.5 LSB. The settling time depends on the external
capacitive load when REFOUT = 1.
12-Bit DAC, Supply Specifications
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX UNIT
AVCC Analog supply voltage
AVCC = DVCC, AVSS = DVSS = 0 V
2.20
3.60
V
DAC12AMPx = 2, DAC12IR = 0,
DAC12IOG = 1,
DAC12_xDAT = 0800h,
VeREF+ = VREF+ = 1.5 V
3 V
65
110
DAC12AMPx = 2, DAC12IR = 1,
DAC12_xDAT = 0800h,
VeREF+ = VREF+ = AVCC
125
250
165
350
IDD
Supply current, single DAC channel(1) (2)
µA
DAC12AMPx = 5, DAC12IR = 1,
DAC12_xDAT = 0800h,
2.2 V, 3 V
VeREF+ = VREF+ = AVCC
DAC12AMPx = 7, DAC12IR = 1,
DAC12_xDAT = 0800h,
VeREF+ = VREF+ = AVCC
750
70
1100
DAC12_xDAT = 800h,
VeREF+ = 1.5 V, ΔAVCC = 100 mV
2.2 V
3 V
PSRR Power supply rejection ratio(3) (4)
dB
DAC12_xDAT = 800h,
VeREF+ = 1.5 V or 2.5 V,
ΔAVCC = 100 mV
70
(1) No load at the output pin, DAC12_0 or DAC12_1, assuming that the control bits for the shared pins are set properly.
(2) Current into reference terminals not included. If DAC12IR = 1 current flows through the input divider; see Reference Input specifications.
(3) PSRR = 20 log (ΔAVCC / ΔVDAC12_xOUT
)
(4) The internal reference is not used.
12-Bit DAC, Linearity Specifications
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 17)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX UNIT
Resolution
12-bit monotonic
12
bits
VeREF+ = 1.5 V, DAC12AMPx = 7, DAC12IR = 1
VeREF+ = 2.5 V, DAC12AMPx = 7, DAC12IR = 1
VeREF+ = 1.5 V, DAC12AMPx = 7, DAC12IR = 1
VeREF+ = 2.5 V, DAC12AMPx = 7, DAC12IR = 1
2.2 V
3 V
±2
±2
±4(2)
LSB
±4
±1(2)
LSB
±1
Integral
INL
nonlinearity(1)
2.2 V
3 V
±0.4
±0.4
Differential
DNL
nonlinearity(1)
(1) Parameters calculated from the best-fit curve from 0x0F to 0xFFF. The best-fit curve method is used to deliver coefficients "a" and "b" of
the first-order equation: y = a + bx. VDAC12_xOUT = EO + (1 + EG) × (VeREF+/4095) × DAC12_xDAT, DAC12IR = 1.
(2) This parameter is not production tested.
74
Copyright © 2010–2012, Texas Instruments Incorporated
TI [ TEXAS INSTRUMENTS ]
