MSP430F663x
SLAS566C –JUNE 2010–REVISED AUGUST 2012
www.ti.com
Battery Backup
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
0.43
MAX UNIT
TA = -40°C
VBAT = 1.7 V,
DVCC not connected,
RTC running
TA = 25°C
TA = 60°C
TA = 85°C
TA = -40°C
TA = 25°C
TA = 60°C
TA = 85°C
TA = -40°C
TA = 25°C
TA = 60°C
TA = 85°C
General
0.52
µA
0.58
0.64
0.50
Current into VBAT terminal in VBAT = 2.2 V,
0.59
IVBAT
case no primary battery is
connected.
DVCC not connected,
RTC running
µA
0.64
0.71
0.68
VBAT = 3 V,
DVCC not connected,
RTC running
0.75
µA
0.79
0.86
VSVSH_IT-
SVSHRL = 0
SVSHRL = 1
SVSHRL = 2
SVSHRL = 3
1.59
1.79
1.98
2.10
1.69
Switch-over level (VCC to
VBAT)
VSWITCH
CVCC = 4.7 µF
1.91
2.11
2.23
1
V
On-resistance of switch
between VBAT and VBAK
0.35
RON_VBAT
VBAT = 1.8 V
0 V
kΩ
VBAT to ADC input channel
12:
VBAT divide,
1.8 V
3 V
0.6
1.0
1.2
±5%
±5%
±5%
VBAT3
V
3.6 V
VBAT3 ≠ VBAT /3
tSample,VBA VBAT to ADC: Sampling time ADC12ON = 1,
1000
2.65
ns
V
required if VBAT3 selected
Error of conversion result ≤ 1 LSB
T3
VCHVx
Charger end voltage
CHVx = 2
2.7
2.9
5
CHCx = 1
CHCx = 2
CHCx = 3
RCHARGE
Charge limiting resistor
10
20
kΩ
USCI (UART Mode)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX UNIT
Internal: SMCLK, ACLK
fUSCI
USCI input clock frequency
External: UCLK
fSYSTEM MHz
Duty cycle = 50% ± 10%
BITCLK clock frequency
(equals baud rate in MBaud)
fBITCLK
tτ
1
MHz
ns
2.2 V
3 V
50
50
600
600
UART receive deglitch time(1)
(1) Pulses on the UART receive input (UCxRX) shorter than the UART receive deglitch time are suppressed. To ensure that pulses are
correctly recognized their width should exceed the maximum specification of the deglitch time.
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