DM385, DM388
SPRS821D –MARCH 2013–REVISED DECEMBER 2013
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BUFFER
Table 3-11. Ball Characteristics (AAR Package) (continued)
BALL
RESET
REL.
PINCNTL
REGISTER NAME
AND ADDRESS[4]
PINCNTL
DEFAULT
VALUE[5]
BALL
RESET
STATE [9]
MODE
[6]
BALL NUMBER [1]
BALL NAME [2]
SIGNAL NAME [3]
TYPE [7] DSIS [8]
POWER [11]
HYS [12]
TYPE [13]
STATE [10]
G29
G28
SPI[0]_SCS[0]
SPI[0]_SCS[0]
PINCNTL81 /
0x4814 0940
0x0006 0000
0x0006 0000
0x01
I/O
PIN
H
H
DVDD
DVDD
SPI[0]_SCS[1]
SPI[0]_SCS[1]
SD1_SDCD
EDMA_EVT1
TIM4_IO
PINCNTL80 /
0x4814 093C
0x01
0x02
0x20
0x40
0x80
0x01
0x80
0x01
0x80
0x01
0x80
0x01
0x80
0x01
I/O
I
1
H
H
1
I
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
NA
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
GP1[6]
N23
M27
M29
J29
SPI[1]_D[0]
SPI[1]_D[0]
GP1[26]
PINCNTL88 /
0x4814 095C
0x0006 0000
0x0006 0000
0x0006 0000
0x0006 0000
H
H
H
H
H
H
H
H
DVDD
DVDD
DVDD
DVDD
SPI[1]_D[1]
SPI[1]_D[1]
GP1[18]
PINCNTL87 /
0x4814 0958
SPI[1]_SCLK
SPI[1]_SCS[0]
SPI[1]_SCLK
GP1[17]
PINCNTL86 /
0x4814 0954
SPI[1]_SCS[0]
GP1[16]
PINCNTL85 /
0x4814 0950
T29
N28
U26
T31
U24
B9
TCLK
TCLK
NA /
NA
NA
H
H
DVDD
DVDD
DVDD
DVDD
DVDD
TDI
TDI
NA /
NA
NA
0x01
0x01
0x01
0x01
0x01
0x01
0x01
I
NA
NA
NA
NA
NA
NA
NA
H
H
TDO
TDO
NA /
NA
NA
O
I
H
H
TMS
TMS
NA /
NA
NA
H
H
TRST
TRST
NA /
NA
NA
I
L
L
TV_OUT0
TV_RSET
TV_VFB0
UART0_CTS
TV_OUT0
TV_RSET
TV_VFB0
NA /
NA
NA
O
A
O
NA
NA
NA
H
NA
NA
NA
H
VDDA_VDAC_1P8
VDDA_VDAC_1P8
VDDA_VDAC_1P8
DVDD
B11
B10
D30
NA /
NA
NA
NA /
NA
NA
UART0_CTS
SPI[1]_SCS[3]
SD0_SDCD
UART0_DCD
SPI[0]_SCS[3]
I2C[2]_SCL
SD1_POW
PINCNTL72 /
0x4814 091C
0x000E 0000
0x01
0x10
0x40
0x01
0x10
0x20
0x40
0x80
I/O
I/O
I
1
1
1
E31
UART0_DCD
PINCNTL74 /
0x4814 0924
0x000E 0000
I
1
H
H
DVDD
I/O
I/O
O
1
1
PIN
PIN
GP1[2]
I/O
50
Device Pins
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