DAC8571
www.ti.com
SLAS373A–DECEMBER 2002–REVISED JULY 2003
ELECTRICAL CHARACTERISTICS (continued)
VDD = +2.7 V to +5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; low power mode; all specifications -40°C to 105°C (unless
otherwise noted)
DAC8571
PARAMETER
CONDITIONS
MIN
TYP
250
160
240
140
MAX
400
225
380
200
UNITS
VDD = +4.5 V to +5.5 V
VIH = VDD, VIL = GND, fast settling
VIH = VDD, VIL = GND, low power
VIH = VDD, VIL = GND, fast settling
VIH = VDD, VIL = GND, low power
DAC active, Iref included
µA
VDD = +2.7 V to +3.6 V
µA
IDD (all power-down modes)
VDD = +4.5 V to +5.5 V
VDD = +2.7 V to +3.6 V
POWER EFFICIENCY
IOUT/IDD
VIH = VDD and VIL = GND
0.2
1
1
µA
µA
VIH = VDD and VIL = GND
0.05
IL = 2 mA, VDD = +5 V
93%
TIMING CHARACTERISTICS
VDD = +2.7 V to +5.5 V; RL = 2 kΩ to GND; all specifications -40°C to 105°C (unless otherwise noted)
SYMBOL
PARAMETER
TEST CONDITIONS
Standard mode
MIN
TYP
MAX
UNITS
100
400
3.4
1.7
kHz
kHz
MHz
MHz
µs
Fast mode
tSCL
SCL clock frequency
High-speed mode, CB - 100pF max
High-speed mode, CB - 400pF max
Standard mode
4.7
Bus free time between a STOP and
START condition
tBUF
tHO; tSTA
tLOW
Fast mode
1.3
µs
Standard mode
4.0
\µs
ns
Hold time (repeated) START con-
dition
Fast mode
600
High-speed mode
160
ns
Standard mode
4.7
µs
LOW period of the SCL clock
HIGH period of the SCL clock
Fast mode
1.3
µs
Standard mode
4.0
µs
Fast mode
600
ns
tHIGH
High-speed mode, CB - 100pF max
High-speed mode, CB - 400pF max
Standard mode
60
ns
120
ns
4.7
µs
Setup time for a repeated START
condition
tSU; tSTA
Fast mode
600
ns
High-speed mode
160
ns
Standard mode
250
ns
tSU; tDAT
Data setup time
Data hold time
Fast mode
100
ns
High-speed mode
10
ns
Standard mode
0
0.9
0.9
µs
Fast mode
0
µs
tHD; tDAT
High-speed mode, CB - 100pF max
High-speed mode, CB - 400pF max
Standard mode
0
70
ns
0
20 + 0.1CB
20 + 0.1CB
10
150
1000
300
40
ns
ns
Fast mode
ns
tRCL
Rise time of SCL signal
High-speed mode, CB - 100pF max
High-speed mode, CB - 400pF max
ns
20
80
ns
4
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