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CC1110F32RHHR 参数 Datasheet PDF下载

CC1110F32RHHR图片预览
型号: CC1110F32RHHR
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗的SoC (系统级芯片)与MCU,存储器,低于1GHz的射频收发器和USB控制器 [Low-Power SoC (System-on-Chip) with MCU, Memory, Sub-1 GHz RF Transceiver, and USB Controller]
分类和应用: 存储射频控制器
文件页数/大小: 249 页 / 3133 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号CC1110F32RHHR的Datasheet PDF文件第93页浏览型号CC1110F32RHHR的Datasheet PDF文件第94页浏览型号CC1110F32RHHR的Datasheet PDF文件第95页浏览型号CC1110F32RHHR的Datasheet PDF文件第96页浏览型号CC1110F32RHHR的Datasheet PDF文件第98页浏览型号CC1110F32RHHR的Datasheet PDF文件第99页浏览型号CC1110F32RHHR的Datasheet PDF文件第100页浏览型号CC1110F32RHHR的Datasheet PDF文件第101页  
CC1110Fx / CC1111Fx  
P2SEL (0xF5) - Port 2 Function Select  
Bit  
7
Field Name  
Reset  
R/W  
R0  
Description  
0
0
Not used  
6
PRI3P1  
R/W  
Port 1 peripheral priority control. These bits shall determine the order of  
precedence in the case when PERCFGassigns USART0 and USART1 to the same  
pins.  
0
1
USART0 has priority  
USART1 has priority  
5
4
3
PRI2P1  
PRI1P1  
PRI0P1  
0
0
0
R/W  
R/W  
R/W  
Port 1 peripheral priority control. These bits shall determine the order of  
precedence in the case when PERCFGassigns USART1 and timer 3 to the same  
pins.  
0
1
USART1 has priority  
Timer 3 has priority  
Port 1 peripheral priority control. These bits shall determine the order of  
precedence in the case when PERCFG assigns timer 1 and timer 4 to the same  
pins.  
0
1
Timer 1 has priority  
Timer 4 has priority  
Port 1 peripheral priority control. These bits shall determine the order of  
precedence in the case when PERCFG assigns USART0 and timer 1 to the same  
pins.  
0
1
USART0 has priority  
Timer 1 has priority  
2
1
0
SELP2_4  
SELP2_3  
SELP2_0  
0
0
0
R/W  
R/W  
R/W  
P2_4 function select  
0
1
General purpose I/O  
Peripheral function  
P2_3 function select  
0
1
General purpose I/O  
Peripheral function  
P2_0 function select  
0
1
General purpose I/O  
Peripheral function  
P0DIR (0xFD) - Port 0 Direction  
Bit  
Field Name  
Reset  
R/W  
Description  
7:0  
DIRP0_[7:0]  
0x00  
R/W  
P0_7 to P0_0 I/O direction  
0
1
Input  
Output  
P1DIR (0xFE) - Port 1 Direction  
Bit  
Field Name  
Reset  
R/W  
Description  
7:0  
DIRP1_[7:0]  
0x00  
R/W  
P1_7 to P1_0 I/O direction  
0
1
Input  
Output  
SWRS033H  
Page 97 of 246  
 
 
 
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