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CC1110F32RHHR 参数 Datasheet PDF下载

CC1110F32RHHR图片预览
型号: CC1110F32RHHR
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗的SoC (系统级芯片)与MCU,存储器,低于1GHz的射频收发器和USB控制器 [Low-Power SoC (System-on-Chip) with MCU, Memory, Sub-1 GHz RF Transceiver, and USB Controller]
分类和应用: 存储射频控制器
文件页数/大小: 249 页 / 3133 K
品牌: TI [ TEXAS INSTRUMENTS ]
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CC1110Fx / CC1111Fx  
6.2 RF Receive Section  
TA = 25 C, VDD = 3.0 V if nothing else stated. All measurement results are obtained using the  
CC1110EM reference design ([1]) if nothing else is stated.  
Parameter  
Min  
Typ  
Max  
Unit Condition/Note  
kHz User programmable (see Section 13.6). The bandwidth limits are  
Digital channel  
filter bandwidth  
58  
812  
proportional to crystal frequency (given values assume a 26 MHz system  
clock).  
315 MHz, 1.2 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0  
(GSK, 1% packet error rate, 20 bytes packet length, 5.2 kHz deviation, 58 kHz digital channel filter bandwidth)  
Receiver  
sensitivity  
−110  
−112  
dBm System clock running at 26 MHz  
dBm System clock running at 24 MHz  
The RX current consumption can be reduced by approximately 2.0 mA  
by setting MDMCFG2.DEM_DCFILT_OFF=1. The typical sensitivity is then  
−107 dBm.  
315 MHz, 38.4 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0  
(GSK, 1% packet error rate, 20 bytes packet length, 20 kHz deviation, 100 kHz digital channel filter bandwidth)  
Receiver  
sensitivity  
−102  
−103  
dBm System clock running at 26 MHz  
dBm System clock running at 24 MHz  
The RX current consumption can be reduced by approximately 2.1 mA  
by setting MDMCFG2.DEM_DCFILT_OFF=1. The typical sensitivity is then  
−99 dBm.  
315 MHz, 250 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0(MDMCFG2.DEM_DCFILT_OFF=1  
cannot be used for data rates > 100 kBaud)  
(GSK, 1% packet error rate, 20 bytes packet length, 127 kHz deviation, 540 kHz digital channel filter bandwidth)  
Receiver  
sensitivity  
94  
94  
dBm System clock running at 26 MHz  
dBm System clock running at 24 MHz  
433 MHz, 1.2 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0  
(GSK, 1% packet error rate, 20 bytes packet length, 5.2 kHz deviation, 58 kHz digital channel filter bandwidth)  
Receiver  
sensitivity  
−110  
−110  
dBm System clock running at 26 MHz  
dBm System clock running at 24 MHz  
The RX current consumption can be reduced by approximately 2.6 mA  
by setting MDMCFG2.DEM_DCFILT_OFF=1. The typical sensitivity is then  
−107 dBm.  
433 MHz, 38.4 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0  
(GSK, 1% packet error rate, 20 bytes packet length, 20 kHz deviation, 100 kHz digital channel filter bandwidth)  
Receiver  
sensitivity  
−102  
−101  
dBm System clock running at 26 MHz  
dBm System clock running at 24 MHz  
The RX current consumption can be reduced by approximately 2.7 mA  
by setting MDMCFG2.DEM_DCFILT_OFF=1. The typical sensitivity is then  
−99 dBm.  
Parameter  
Min  
Typ  
Max  
Unit Condition/Note  
433 MHz, 250 kBaud data rate, sensitivity optimized, MDMCFG2.DEM_DCFILT_OFF=0(MDMCFG2.DEM_DCFILT_OFF=1  
cannot be used for data rates > 100 kBaud)  
(GSK, 1% packet error rate, 20 bytes packet length, 127 kHz deviation, 540 kHz digital channel filter bandwidth)  
Receiver  
sensitivity  
−95  
−93  
dBm System clock running at 26 MHz  
dBm System clock running at 24 MHz  
See Table 9 for typical variation over operating conditions  
SWRS033H  
Page 13 of 246  
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