bq4285E/L
update period (see Figure 2). The alarm flag bit may
also be set during the update cycle.
Functional Description
Address Map
The bq4285E/L copies the local register updates into the
user buffer accessed by the host processor. When a 1 is
written to the update transfer inhibit bit (UTI) in regis-
ter B, the user copy of the clock and calendar bytes re-
mains unchanged, while the local copy of the same bytes
continues to be updated every second.
The bq4285E/L provides 14 bytes of clock and con-
trol/status registers and 114 bytes of general nonvolatile
storage. Figure 1 illustrates the address map for the
bq4285L.
The update-in-progress bit (UIP) in register A is set
tBUC time before the beginning of an update cycle (see
Figure 2). This bit is cleared and the update-complete
flag (UF) is set at the end of the update cycle.
Update Period
The update period for the bq4285E/L is one second. The
bq4285E/L updates the contents of the clock and calen-
dar locations during the update cycle at the end of each
Figure 1. Address Map
Figure 2. Update Period Timing and UIP
4
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