bq3285ED/LD
UIP - Update Cycle Status
DF - Data Format
7
6
-
5
-
4
-
3
-
2
-
1
-
0
-
7
-
6
-
5
-
4
-
3
-
2
1
-
0
-
UIP
DF
This read-only bit is set prior to the update cycle. When
UIP equals 1, an RTC update cycle may be in progress.
UIP is cleared at the end of each update cycle. This bit
is also cleared when the update transfer inhibit (UTI)
bit in register B is 1.
This bit selects the numeric format in which the time,
alarm, and calendar bytes are represented:
1 = Binary
0 = BCD
Register B
UIE - Update Cycle Interrupt Enable
Register B Bits
7
6
5
4
3
-
2
1
0
7
-
6
-
5
-
4
3
-
2
-
1
-
0
-
UTI PIE
AIE UIE
DF
HF
DSE
UIE
Register B enables:
This bit enables an interrupt request due to an update
ended interrupt event:
Update cycle transfer operation
Interrupt events
1 = Enabled
0 = Disabled
Daylight saving adjustment
Register B selects:
The UIE bit is automatically cleared when the UTI bit
equals 1.
Clock and calendar data formats
All bits of register B are read/write.
Bit 3 - Un u sed Bit.
AIE - Alarm Interrupt Enable
7
-
6
-
5
4
-
3
-
2
-
1
-
0
-
AIE
DSE - Daylight Saving Enable
This bit enables an interrupt request due to an alarm
interrupt event:
7
-
6
-
5
-
4
-
3
-
2
-
1
-
0
DSE
1 = Enabled
0 = Disabled
This bit enables daylight-saving time adjustments when
written to 1:
PIE - Periodic Interrupt Enable
On the last Sunday in October, the first time the
bq3285ED/LD increments past 1:59:59 AM, the time
falls back to 1:00:00 AM.
7
-
6
5
-
4
-
3
-
2
-
1
-
0
-
PIE
On the first Sunday in April, the time springs
forward from 2:00:00 AM to 3:00:00 AM.
This bit enables an interrupt request due to a periodic
interrupt event:
HF - Hour Format
1 = Enabled
0 = Disabled
7
-
6
-
5
-
4
-
3
-
2
-
1
0
-
HF
UTI - Update Transfer Inhibit
This bit selects the time-of-day and alarm hour format:
1 = 24-hour format
7
6
-
5
-
4
-
3
-
2
-
1
-
0
-
UTI
0 = 12-hour format
July 1997
9