bq24735
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SLUSAK9 –SEPTEMBER 2011
ELECTRICAL CHARACTERISTICS (continued)
4.5 V ≤ VVCC ≤ 24 V, 0°C ≤ TJ ≤ 125°C, typical values are at TA = 25°C, with respect to GND (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
REGN REGULATOR
VREGN_REG
REGN regulator voltage
V
VCC > 6.5V, VACDET > 0.6V (0-45mA load)
5.5
50
6
6.5
V
VREGN = 0V, VVCC > UVLO charge enabled and not in
TSHUT
75
mA
IREGN_LIM
REGN current limit
VREGN = 0V, VVCC > UVLO charge disabled or in
TSHUT
7
14
1
mA
REGN output capacitor required for
stability
ILOAD = 100µA to 50mA
CREGN
µF
INPUT UNDERVOLTAGE LOCKOUT COMPARATOR (UVLO)
Under voltage rising threshold
UVLO
VVCC rising
VVCC falling
3.5
3.75
340
4
V
Under voltage hysteresis, falling
mV
FAST DPM COMPARATOR (FAST_DPM)
Fast DPM comparator stop charging rising threshold with respect to input current limit, voltage
across input sense resistor rising edge
VFAST_DPM
103%
107%
111%
QUIESCENT CURRENT
Battery BATFET OFF STATE Current,
VVBAT = 16.8V, VCC disconnect from battery, BATFET
charge pump off, BATFET turns off, TJ = 0 to 85°C
BATFET off,
IBAT_BATFET_OFF
5
µA
µA
ISRP + ISRN + IPHASE + IACP + IACN
Battery BATFET ON STATE Current,
BATFET on,
ISRP + ISRN + IPHASE + IVCC + IACP + IACN
VVBAT = 16.8V, VCC connect from battery, BATFET
charge pump on, BATFET turns on, TJ = 0 to 85°C
IBAT_BATFET_ON
25
Standby quiescent current, IVCC + IACP
IACN
+
V
VCC > UVLO, VACDET > 0.6V, charge disabled,
ISTANDBY
IAC_NOSW
IAC_SW
0.65
1.5
10
0.8
3
mA
mA
mA
TJ = 0 to 85°C
Adapter bias current during charge,
IVCC + IACP + IACN
VVCC > UVLO, 2.4V < VACDET < 3.15V,
charge enabled, no switching, TJ = 0 to 85°C
Adapter bias current during charge,
IVCC + IACP + IACN
VVCC > UVLO, 2.4V < VACDET < 3.15V,
charge enabled, switching, MOSFET Sis412DN
ACOK COMPARATOR
VACOK_RISE
ACOK rising threshold
ACOK falling hysteresis
V
V
V
VCC > UVLO, VACDET rising
2.376
35
2.4
55
2.424
75
V
VACOK_FALL_HYS
VCC> UVLO, VACDET falling
mV
VCC> UVLO, VACDET rising above 2.4V,
100
0.9
150
1.3
200
ms
s
First time OR ChargeOption() bit [15] = 0
VACOK_RISE_DEG
ACOK rising deglitch (Specified by design)
VVCC> UVLO, VACDET rising above 2.4V,
(NOT First time) AND ChargeOption() bit [15] = 1
(Default)
1.7
0.8
VWAKEUP_RISE
VWAKEUP_FALL
WAKEUP detect rising threshold
WAKEUP detect falling threshold
V
VCC> UVLO, VACDET rising
VCC> UVLO, VACDET falling
0.57
0.51
V
V
V
0.3
VCC to SRN COMPARATOR (VCC_SRN)
VVCC-SRN_FALL
VVCC-SRN _RHYS
VCC-SRN falling threshold
VCC-SRN rising hysteresis
VVCC falling towards VSRN
VVCC rising above VSRN
70
125
150
200
200
mV
mV
100
ACN to SRN COMPARATOR (ACN_SRN)
VACN-SRN_FALL
VACN-SRN_RHYS
ACN to BAT falling threshold
ACN to BAT rising hysteresis
VACN falling towards VSRN
VACN rising above VSRN
120
40
200
80
280
120
mV
mV
HIGH SIDE IFAULT COMPARATOR (IFAULT_HI)(1)
VIFAULT_HI_RISE ACP to PHASE rising threshold
LOW SIDE IFAULT COMPARATOR (IFAULT_LOW)(1)
VIFAULT_LOW_RISE PHASE to GND rising threshold
INPUT OVER-VOLTAGE COMPARATOR (ACOV)
ChargeOption() bit [8] = 1 (Default)
450
750
1200
mV
mV
ChargeOption() bit [8] = 0 Disable function
ChargeOption() bit [7] = 0 (Default)
ChargeOption() bit [7] = 1
70
135
230
220
340
140
VACOV
ACDET over voltage rising threshold
ACDET over voltage falling hysteresis
VACDET rising
VACDET falling
3.05
50
3.15
75
3.25
100
V
VACOV_HYS
mV
(1) User can adjust threshold via SMBus ChargeOption() REG0x12.
Copyright © 2011, Texas Instruments Incorporated
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