AM6548, AM6528, AM6526
ZHCSLA7B –DECEMBER 2019 –REVISED JUNE 2021
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VDD_WKUP (min.)
VSS
VDD_WKUP
VDDA_WKUP (min.)
VDDA_WKUP
WKUP_OSC0_XO
tsX
VSS
Time
图7-16. WKUP_OSC0 Start-up Time
7.9.4.1.2 WKUP_OSC0 LVCMOS Digital Clock Source
图 7-17 shows the recommended oscillator connections when WKUP_OSC0 is connected to an LVCMOS
square-wave digital clock source The 1.8-V LVCMOS-Compatible clock source is connected to the
WKUP_OSC0_XI pin. In this mode of operation, the WKUP_OSC0_XO pin is left unconnected and should not
be used to source any external components.
Device
WKUP_OSC0_XO
VSS
WKUP_OSC0_XI
NC
PCB Ground
SPRSP08_CLK_02
图7-17. 1.8-V LVCMOS-Compatible Clock Input
表7-16 summarizes the WKUP_OSC0 input clock electrical characteristics
表7-16. WKUP_OSC0 Switching Characteristics –Crystal Mode
NAME
DESCRIPTION
MIN
TYP
MAX
UNIT
MHz
f
Frequency
19.2, 20, 24, 25, 26, 27
CIN
IIN
Input capacitance
Input current (3.3V mode)
2.184
4
2.384
6
2.584
10
pF
µA
表7-17 details the WKUP_OSC0 input clock timing requirements.
表7-17. WKUP_OSC0 Input Clock Timing Requirements
NAME
DESCRIPTION
MIN
TYP
MAX
UNIT
CK0
1 / tc(WKUP_OSC0_XI) Frequency, WKUP_OSC0_XI
19.2, 20, 24, 25, 26, 27
MHz
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