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SPRS717F –OCTOBER 2011–REVISED APRIL 2013
2.3.6.2 GEMAC_CPSW
Table 2-46. GEMAC_CPSW/MDIO Signals Description
TYPE
[3]
SIGNAL NAME [1]
DESCRIPTION [2]
ZCE BALL [4]
ZCZ BALL [4]
mdio_clk
MDIO Clk
O
R19
P17
M18
M17
mdio_data
MDIO Data
I/O
Table 2-47. GEMAC_CPSW/MII1 Signals Description
TYPE
[3]
SIGNAL NAME [1]
DESCRIPTION [2]
ZCE BALL [4]
ZCZ BALL [4]
gmii1_col
MII Colision
I
J19
H16
H17
L18
M16
L15
L16
L17
J17
J15
K18
K17
K16
K15
J18
J16
gmii1_crs
MII Carrier Sense
I
J18
gmii1_rxclk
gmii1_rxd0
gmii1_rxd1
gmii1_rxd2
gmii1_rxd3
gmii1_rxdv
gmii1_rxer
gmii1_txclk
gmii1_txd0
gmii1_txd1
gmii1_txd2
gmii1_txd3
gmii1_txen
MII Receive Clock
I
M19
P18
P19
N16
N17
L19
K19
N19
L18
M18
N18
M17
K17
MII Receive Data bit 0
MII Receive Data bit 1
MII Receive Data bit 2
MII Receive Data bit 3
MII Receive Data Valid
MII Receive Data Error
MII Transmit Clock
I
I
I
I
I
I
I
MII Transmit Data bit 0
MII Transmit Data bit 1
MII Transmit Data bit 2
MII Transmit Data bit 3
MII Transmit Enable
O
O
O
O
O
Table 2-48. GEMAC_CPSW/MII2 Signals Description
TYPE
[3]
SIGNAL NAME [1]
DESCRIPTION [2]
ZCE BALL [4]
ZCZ BALL [4]
gmii2_col
MII Colision
I
V18
R15
NA
NA
NA
NA
NA
NA
W18
NA
NA
NA
NA
NA
NA
U18
T17
T15
V17
T16
U16
V16
V14
U17
U15
V15
R14
T14
U14
R13
gmii2_crs
MII Carrier Sense
I
gmii2_rxclk
gmii2_rxd0
gmii2_rxd1
gmii2_rxd2
gmii2_rxd3
gmii2_rxdv
gmii2_rxer
gmii2_txclk
gmii2_txd0
gmii2_txd1
gmii2_txd2
gmii2_txd3
gmii2_txen
MII Receive Clock
I
MII Receive Data bit 0
MII Receive Data bit 1
MII Receive Data bit 2
MII Receive Data bit 3
MII Receive Data Valid
MII Receive Data Error
MII Transmit Clock
I
I
I
I
I
I
I
MII Transmit Data bit 0
MII Transmit Data bit 1
MII Transmit Data bit 2
MII Transmit Data bit 3
MII Transmit Enable
O
O
O
O
O
Table 2-49. GEMAC_CPSW/RGMII1 Signals Description
TYPE
[3]
SIGNAL NAME [1]
DESCRIPTION [2]
ZCE BALL [4]
M19
ZCZ BALL [4]
rgmii1_rclk
RGMII Receive Clock
I
L18
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