THCV231-Q_THCV236-Q_Rev.2.60_E
Read/Write access to Sub-Link Slave Register
HOST MPU can access to Sub-Link Slave’s register via Sub-Link Master by Sub-Link Master register settings.
Register address of Sub-Link Slave is from 0x80 to 0xFF. See Register Map for more information.
Figure 11. Host MPU to Sub-Link Slave Register access configuration
Table 20. Sub-Link slave register Write Procedure
Step
Description
R/W
W
Address
0x02 bit7
0x10-0x1F
1
2
Write 1 or 0 and clear(auto clear) access status register (2WIRE_ACS_END_INT).
Set the data for Sub-Link Slave to write (Max 16byte).
W
Set Device ID of Sub-Link Master device.
3
4
W
W
0x20
0x21
(Value corresponding to AIN1 and AIN0 setting. e.g.[AIN1,AIN0]=[0,0] → 7’h0B)
Set the byte number written to Sub-Link Slave (Max 16byte).
(Byte number = register value + 1)
5
6
Set the start address of Sub-Link Slave register to write.
Write 1 to WR_START_8B. (Start write access to Sub-Link Slave register)
2-wire serial slave of Sub-Link Master perform clock stretching until Sub-Link Slave
register access is completed.
W
W
0x23
0x25 (*1)
7
-
-
(*2)
7
When write access is completed, 2WIRE_ACS_END_INT register value become 1
and interrupt occurs (INT=H → L).
-
-
(*3)
8
If write access was normally ended, read value should be “0x1”.
R
0x02 bit7
*1 It’s Prohibit that HOST MPU start access to Sub-Link Slave or remote 2-wire serial slave before the previous access to
Sub-Link Slave or remote side 2-wire serial slave is completed.
*2 When 2WIRE_MODE = 00 (Clock Stretching Mode)
*3 When 2WIRE_MODE = 01 (No Clock Stretching Mode)
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