78P2351
Single Channel
OC-3/ STM1-E/ E4 LIU
PIN DESCRIPTION
LEGEND
TYPE
DESCRIPTION
Analog Pin
TYPE DESCRIPTION
LVPECL-Compatible Differential Output
(Tie unused pins to supply or leave floating)
CMOS Digital Output
A
PO
CO
(Tie unused pins to ground)
CMOS Schmitt Trigger Input
(Tie unused pins to ground)
CMOS Digital Input
CIS
CI
(Leave unused pins floating)
CMOS Tristate Digital Output
COZ
OD
(Tie unused pins to ground)
(Leave unused pins floating)
Open-drain Digital Output
CIU
CMOS Digital Input w/ Pull-up
(Leave unused pins floating)
CID
CIT
CMOS Digital Input w/ Pull-down
3-State CMOS Digital Input
S
Supply
G
Ground
LVPECL-Compatible Differential Input
PI
(Tie unused pins to ground)
TRANSMITTER PINS
NAME
PIN
TYPE DESCRIPTION
PI0D
PI1D
PI2D
PI3D
24
25
26
27
Transmit (Parallel Mode) Data Input:
Four-bit CMOS parallel (nibble) inputs. Data is latched in on the rising edge
(default) of the transmit parallel clock and serialized with the MSB (PIx3D)
transmitted first.
CI
Transmit (Parallel Mode) Clock Input:
A 34.816 MHz (E4) or 38.88 MHz (STM1) CMOS clock input that must be
source synchronous with the reference clock supplied at the CKREFP/N pins.
Used only in Slave Parallel Mode and Loop-timing Parallel Mode.
Transmit (Parallel Mode) Clock Output:
A 34.816 MHz (E4) or 38.88 MHz (STM1) CMOS clock output that is
intended to latch in synchronous parallel data. Active during reset. Used only
in Master Parallel Mode (output disabled in all other transmit modes).
PICK
23
28
CIS
CO
PTOCK
Transmit (Serial Mode) Data Input:
SIDP
SIDN
8
9
PI
PI
Differential NRZ data input. See Transmitter Operation section for more info
on different clocking/timing modes.
Transmit (Serial Mode) Clock Input:
SICKP
SICKN
5
6
A 155.52MHz synchronous differential input clock used to clock in the serial
NRZ data. By default, data is clocked in on the rising edge of SICKP.
Transmit (CMI Mode) Analog Data Output:
A CMI encoded data signal output conforming to the relevant ITU-T G.703
pulse templates when properly terminated and transformer coupled to 75Ω
cable. Outputs are tri-stated when transmitter is disabled. Active, but
undefined during reset.
CMIP
CMIN
93
94
A
CMI2P
CMI2N
79
78
Transmit Monitor Output:
A
Redundant CMI transmit driver enabled by RCSL control.
Transmit (Serial Mode) Clock Output:
TXCKP
TXCKN
96
97
PO
A 2x line rate LVPECL clock output used to clock out the transmit CMI data.
Used for diagnostics or far end re-timing. Active during reset.
Transmit (Optical Mode) LVPECL Data Output:
Transmit data outputs used for interfacing with optical transceiver modules
when in Fiber (NRZ pass through) mode.
ECLP
ECLN
99
100
PO
Page: 17 of 42
2006 Teridian Semiconductor Corporation
Rev. 2.4
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
