欢迎访问ic37.com |
会员登录 免费注册
发布采购

73S8010R-ILR/F 参数 Datasheet PDF下载

73S8010R-ILR/F图片预览
型号: 73S8010R-ILR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 低成本智能卡接口 [Low Cost Smart Card Interface]
分类和应用: 模拟IC信号电路光电二极管PC
文件页数/大小: 24 页 / 343 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
 浏览型号73S8010R-ILR/F的Datasheet PDF文件第1页浏览型号73S8010R-ILR/F的Datasheet PDF文件第2页浏览型号73S8010R-ILR/F的Datasheet PDF文件第3页浏览型号73S8010R-ILR/F的Datasheet PDF文件第5页浏览型号73S8010R-ILR/F的Datasheet PDF文件第6页浏览型号73S8010R-ILR/F的Datasheet PDF文件第7页浏览型号73S8010R-ILR/F的Datasheet PDF文件第8页浏览型号73S8010R-ILR/F的Datasheet PDF文件第9页  
73S8010R
Low Cost Smart Card Interface
DATA SHEET
MICROCONTROLLER INTERFACE
PIN
(SO)
23
1
2
3
PIN
(QFN)
22
29
30
31
NAME
INT
SAD0
SAD1
SAD2
DESCRIPTION
Interrupt output(negative assertion). Interrupt output signal to the processor. A 20kΩ pull up to
V
DD
is provided internally
Serial device address bits. Digital inputs for address selection that allows for the connection of up
to 8 devices in parallel. Address selections as follows:
SAD2
0
0
0
0
1
1
1
1
SAD1
0
0
1
1
0
0
1
1
SAD0
0
1
0
1
0
1
0
1
I C Address (7 bits)
40h
42h
44h
46h
48h
4Ah
4Ch
4Eh
2
Note: Pins SADO and SAD1 are internally pulled-down and SAD2 is internally pulled-up.
The default address when left unconnected is 48h.
SCL
SDA
I/OUC
AUX1UC
AUX2UC
19
20
26
27
28
18
19
26
27
28
I C clock signal input
I C bi-directional serial data signal
System controller data I/O to/from the card. Includes internal pull-up resistor to V
DD
System controller auxiliary data I/O to/from the card. Includes internal pull-up resistor to V
DD
System controller auxiliary data I/O to/from the card. Includes internal pull-up resistor to V
DD
2
2
Page: 4 of 24
©
2005-2008 TERIDIAN Semiconductor Corporation
Rev 1.5