73S8010R
Low Cost Smart Card Interface
DATA SHEET
PIN DESCRIPTION
CARD INTERFACE
NAME
I/O
AUX1
AUX2
RST
CLK
PRES
VCC
GND
PIN
(SO)
11
13
12
16
15
10
17
14
PIN
(QFN)
8
11
10
14
13
7
15
12
DESCRIPTION
Card I/O: Data signal to/from card. Includes a pull-up resistor to V
CC.
AUX1: Auxiliary data signal to/from card. Includes a pull-up resistor to V
CC.
AUX2: Auxiliary data signal to/from card. Includes a pull-up resistor to V
CC.
Card reset: provides reset (RST) signal to card.
Card clock: provides clock (CLK) signal to card. The rate of this clock is determined by crystal
oscillator frequency and CLKSEL bits in the control register.
Card Presence switch: active high indicates card is present. Includes a pull-down resistor.
Card power supply – logically controlled by sequencer, output of LDO regulator. Requires an
external filter capacitor to the card GND.
Card ground.
MISCELLANEOUS INPUTS AND OUTPUTS
NAME
XTALIN
XTALOUT
VDDF_ADJ
NC
PIN
(SO)
24
25
18
7, 8, 9
PIN
(QFN)
23
24
17
4, 5, 6,
9, 16,
25, 32
DESCRIPTION
Crystal oscillator input: can either be connected to crystal or driven as a source for the card clock.
Crystal oscillator output: connected to crystal. Left open if XTALIN is being used as external
clock input.
V
DD
threshold adjustment input: this pin can be used to overwrite higher V
DDF
value (that controls
deactivation of the card). Must be left open if unused.
Non-connected pin.
POWER SUPPLY AND GROUND
NAME
VDD
VPC
GND
GND
GND
PIN
(SO)
21
6
4
14
5, 22
PIN
(QFN)
20
3
1
12
2,21
DESCRIPTION
System controller interface supply voltage and supply voltage for internal circuitry.
LDO regulator power supply source.
LDO regulator ground.
Smart Card I/O Ground.
Digital ground.
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©
2005-2008 TERIDIAN Semiconductor Corporation
Rev 1.5
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
