73S8010R
Low Cost Smart Card Interface
DATA SHEET
FUNCTIONAL DIAGRAM
VDD
[20]
21
VDDF_ADJ
[17]
18
GND
[2]
5
VPC
[3]
6
[4, 5, 6, 9, 16, 25, 32]
7, 8, 9
NC
VPC FAULT
GND
[21]
22
VDD VOLTAGE SUPERVISOR
VOLTAGE REFERENCE
[1]
4
VDD FAULT
VCC FAULT
SCL
[18]
19
LDO
REGULATOR
&
VOLTAGE
SUPERVISORS
GND
[12]
14
GND
[15]
17
Int_Clk
SDA
[19]
20
R-C
OSC.
VCC
SAD0
SAD1
SAD2
INT
[29]
1
[30]
2
[31]
3
I
2
C
DIGITAL
&
FAULT LOGIC
ICC RESET
BUFFER
[14]
16
RST
[22]
23
ISO-7816
SEQUENCER
ICC CLOCK
BUFFER
[13]
15
CLK
[7]
10
XTALIN
[23]
24
PRES
XTAL
OSC
[24]
25
XTALOUT
CLOCK
GENERATION
OVER
TEMP
TEMP FAULT
[26]
26
[8]
11
IOUC
[27]
27
I/O
AUX1UC
AUX2UC
[28]
28
ICC I/O BUFFERS
[11]
13
AUX1
AUX2
[10]
12
Pin numbers reference to the SO28 package
[Pin numbers]
reference to the QFN32 Package
Figure 1: 73S8010R Block Diagram
Page: 2 of 24
©
2005-2008 TERIDIAN Semiconductor Corporation
Rev 1.5
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
