73S1215F Data Sheet
DS_1215F_003
Smart Card VCC Control/Status Register (VccCtl): 0xFE03 Å 0x00
This register is used to control the power up and power down of the integrated smart card interface. It is
used to determine whether to apply 5V, 3V, or 1.8V to the smart card. Perform the voltage selection with
one write operation, setting both VCCSEL.1 and VCCSEL.0 bits simultaneously. The VDDFLT bit (if
enabled) will provide an emergency deactivation of the internal smart card slot. See the VDD Fault
Detect Function section for more detail.
Table 84: The VccCtl Register
MSB
LSB
SCPWRDN
VCCSEL.1 VCCSEL.0 VDDFLT
RDYST
VCCOK
–
–
Bit
Symbol
Function
Setting non-zero value for bits 7,6 will begin activation sequence with target
Vcc as given below:
VccCtl.7
VCCSEL.1
State VCCSEL.1
VCCSEL.0
VCC
1
2
3
4
0
0
1
1
0
1
0
1
0V
1.8V
3.0V
5V
A card event or VCCOK going low will initiate a deactivation sequence.
When the deactivation sequence for RST, CLK and I/O is complete, VCC will
be turned off. When this type of deactivation occurs, the bits must be reset
before initiating another activation.
VccCtl.6
VCCSEL.0
If this bit is set = 0, the CMDVCC3B and CMDVCC5B outputs are
immediately set = 1 to signal to the companion circuit to begin deactivation
when there is a VDD Fault event. If this bit is set = 1 and there is a VDD
Fault, the firmware should perform a deactivation sequence and then set
CMDVCC3B or CMDVCC5B = 1 to signal the companion circuit to set
VCC = 0.
VccCtl.5
VccCtl.4
VDDFLT
RDYST
If this bit is set = 1, the activation sequence will start when bit VCCOK is
set = 1. If not set, the deactivation sequence shall start when the VCCTMR
times out.
VccCtl.3
VccCtl.2
VccCtl.1
VCCOK
(Read only). Indicates that VCC output voltage is stable.
–
–
This bit controls the power down mode of the 73S1215F circuit.
1 = power down, 0 = normal operation.
VccCtl.0
SCPWRDN
90
Rev. 1.4
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
