FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
An alternative data pointer is available in the form of the PDATA register (SFR 0xBF), sometimes referred
to as USR2). It defines the high byte of a 16-bit address when reading or writing XDATA with the instruction
MOVX A,@Ri or MOVX @Ri,A.
Internal Data Memory Map and Access
The Internal data memory provides 256 bytes (0x00 to 0xFF) of data memory. The internal data memory
address is always 1 byte wide. Table 8 shows the internal data memory map.
The Special Function Registers (SFR) occupy the upper 128 bytes. The SFR area of internal data memory
is available only by direct addressing. Indirect addressing of this area accesses the upper 128 bytes of
Internal RAM. The lower 128 bytes contain working registers and bit addressable memory. The lower 32
bytes form four banks of eight registers (R0-R7). Two bits on the program memory status word (PSW) select
which bank is in use. The next 16 bytes form a block of bit addressable memory space at bit addresses
0x00-0x7F. All of the bytes in the lower 128 bytes are accessible through direct or indirect addressing.
Table 8: Internal Data Memory Map
Address Range
Direct addressing
Indirect addressing
0x80
0x30
0x20
0x00
0xFF
0x7F
0x2F
0x1F
Special Function Registers (SFRs)
RAM
Byte addressable area
Bit addressable area
Register banks R0…R7
1.4.2 Special Function Registers (SFRs)
A map of the Special Function Registers is shown in Table 9.
Only a few addresses in the SFR memory space are occupied, the others are not implemented. A read
access to unimplemented addresses will return undefined data, while a write access will have no effect.
SFRs specific to the 71M6531D/F and 71M6532D/F are shown in bold print on a gray field. The registers
at 0x80, 0x88, 0x90, etc., are bit addressable, all others are byte addressable. See the restrictions for the
INTBITS register in Table 14.
Table 9: Special Function Register Map
Bit
Byte Addressable
Hex/
Bin
Bin/
Hex
Addressable
X000
INTBITS
B
X001
X010
X011
X100
X101
X110
X111
F8
F0
E8
E0
D8
D0
C8
C0
B8
B0
A8
A0
98
90
88
80
FF
F7
EF
E7
DF
D7
CF
C7
BF
B7
AF
A7
9F
97
IFLAGS
A
WDCON
PSW
T2CON
IRCON
IEN1
IP1
S0RELH
FLSHCTL
S0RELL
DIR0
S1RELH
S1CON
PDATA
P3
FL_BANK PGADR
IEN0
IP0
DIR2
S0BUF
DIR1
TMOD
SP
P2
S0CON
P1
IEN2
S1BUF S1RELL EEDATA EECTRL
DPS
ERASE
TCON
P0
TL0
TL1
TH0
TH1
CKCON
8F
87
DPL
DPH
DPL1
DPH1
PCON
v1.3
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