欢迎访问ic37.com |
会员登录 免费注册
发布采购

71M6511H-IGTR 参数 Datasheet PDF下载

71M6511H-IGTR图片预览
型号: 71M6511H-IGTR
PDF下载: 下载PDF文件 查看货源
内容描述: 单相电能计量芯片 [Single-Phase Energy Meter IC]
分类和应用:
文件页数/大小: 95 页 / 860 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
 浏览型号71M6511H-IGTR的Datasheet PDF文件第50页浏览型号71M6511H-IGTR的Datasheet PDF文件第51页浏览型号71M6511H-IGTR的Datasheet PDF文件第52页浏览型号71M6511H-IGTR的Datasheet PDF文件第53页浏览型号71M6511H-IGTR的Datasheet PDF文件第55页浏览型号71M6511H-IGTR的Datasheet PDF文件第56页浏览型号71M6511H-IGTR的Datasheet PDF文件第57页浏览型号71M6511H-IGTR的Datasheet PDF文件第58页  
71M6511/71M6511H  
Single-Phase Energy Meter IC  
DATA SHEET  
AUGUST 2007  
XFER_BUSY interrupt. After these first two cycles, CHOP_EN returns to 11 (automatic toggle). The value of CHOP_EN, when  
set after the XFER_BUSY interrupt, is in force for the entire following multiplexer cycle.  
When using this sequence, the alternate multiplexer cycle is toggled between positive and reversed connection resulting in  
accurate temperature measurement.  
An example for proper application of the CHOP_EN bits can be found in the Demo Code shipped with the 6511 and 6511  
Demo Kits. Firmware implementations should closely follow this example.  
Accumulation Interval m  
Accumulation Interval m+1  
Accumulation Interval m+2  
alt. MUX  
cycle  
MUX  
MUX  
MUX  
MUX  
MUX  
alt. MUX  
cycle  
alt. MUX  
cycle  
MUX  
MUX  
MUX  
MUX  
cycle 2 cycle 3  
cycle n  
cycle n  
cycle n  
cycle 2 cycle 3  
cycle 2  
cycle 3  
Chop Polarity  
re-  
re-  
re-  
re-  
re-  
Positive  
Positive  
Positive Positive  
Positive  
Positive Positive  
versed  
versed  
versed  
versed  
versed  
CE_BUSY interrupt  
XFER_BUSY interrupt  
MUX_ALT  
CHOP_EN  
01  
11  
(11)  
(11)  
(11)  
10  
11  
(11)  
(11)  
(11)  
01  
11  
(11)  
(11)  
(11)  
Figure 23: Sequence with Alternate Multiplexer Cycles and Controlled Chopping  
Internal/External Pulse Generation and Pulse Counting  
The CE is the source for pulses. It can generate pulses directly based on the voltage and current inputs and the configured  
pulse generation parameters. This is called “internal pulse generation”, and applies when the CE RAM register EXT_PULSE  
(address 0x37) equals 0. Alternatively, the CE can be configured to generate pulses based on registers that are controlled by  
the MPU (“external pulse generation”), i.e. when the register EXT_PULSE equals 15. In the case of external pulse generation,  
the MPU writes values to the CE registers APULSEW (0x26) and APULSER (0x27).  
The pulse rate, usually inversely expressed as “Kh” (and measured in Wh per pulse), is determined by the CE RAM registers  
WRATE, PULSE_SLOW, PULSE_FAST, In_8, as well as by the sensor scaling VMAX and IMAX per the equation:  
VMAX IMAX 47.1132  
In_8WRATE NACC X  
Kh =  
[Wh/ pulse]  
where  
In_8 is the gain factor (1 or 8) controlled by the CE variable In_SHUNT,  
X is the pulse gain factor controlled by the CE variables PULSE_SLOW and PULSE_FAST  
NACC is the accumulation count (PRE_SAMPS * SUM_CYCLES)  
Page: 54 of 95  
© 2005-2007 TERIDIAN Semiconductor Corporation  
V2.6  
 复制成功!