TSC80251G2D
State 1
State 2
State 3
State 1 (next cycle)
WCLK
T
min
CLYX
T
max
CLYX
ALE
T
CLYV
RD#/PSEN#
WR# stretched
T
T
max
WLYX
min
WLYX
T
WLYV
WAIT#
P0
A7:0
D7:0
stretched
stretched
P2
A15:8
Figure 23. Real-time Synchronous Wait State: Data Write
11.3 AC Characteristics - Real-Time Asynchronous Wait State
Definition of symbols
Table 49. Real-Time Asynchronous Wait Timing Symbol Definitions
Signals
Conditions
S
PSEN#/RD#/WR#
AWAIT#
L
Low
Y
V
X
Valid
No Longer Valid
Timings
Table 50. Real-Time Asynchronous Wait AC Timings; V = 2.7 to 5.5 V, T = -40 to 85°C
DD
A
Symbol
Parameter
Min
Max
Unit
T
PSEN#/RD#/WR# Low to Wait Set-up
Wait Hold after PSEN#/RD#/WR# Low
T
- 10
ns
SLYV
SLYX
OSC
(1)
T
(2N-1)·T
+ 10
ns
OSC
Note:
1. N is the number of wait states added (N≥ 1).
Waveforms
RD#/PSEN#/WR#
T
SLYX
T
SLYV
AWAIT#
Figure 24. Real-time Asynchronous Wait State Timings
46
Rev. A - May 7, 1999
TEMIC [ TEMIC SEMICONDUCTORS ]
