ICM-20690
Slave
ACK
ACK
ACK DATA
DATA
6.4 I2C TERMS
Signal
S
Description
Start Condition: SDA goes from high to low while SCL is high
Slave I2C address
Write bit (0)
AD
W
R
ACK
Read bit (1)
Acknowledge: SDA line is low while the SCL line is high at the 9th clock
cycle
NACK
RA
Not-Acknowledge: SDA line stays high at the 9th clock cycle
ICM-20690 internal register address
DATA
P
Transmit or received data
Stop condition: SDA going from low to high while SCL is high
Table 15. I2C Terms
Page 30 of 76
Document Number: DS-000178
Revision: 1.0
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