欢迎访问ic37.com |
会员登录 免费注册
发布采购

TSL2563 参数 Datasheet PDF下载

TSL2563图片预览
型号: TSL2563
PDF下载: 下载PDF文件 查看货源
内容描述: 低压灯 - 数字转换器 [LOW-VOLTAGE LIGHT-TO-DIGITAL CONVERTER]
分类和应用: 转换器
文件页数/大小: 38 页 / 432 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
 浏览型号TSL2563的Datasheet PDF文件第6页浏览型号TSL2563的Datasheet PDF文件第7页浏览型号TSL2563的Datasheet PDF文件第8页浏览型号TSL2563的Datasheet PDF文件第9页浏览型号TSL2563的Datasheet PDF文件第11页浏览型号TSL2563的Datasheet PDF文件第12页浏览型号TSL2563的Datasheet PDF文件第13页浏览型号TSL2563的Datasheet PDF文件第14页  
TSL2562, TSL2563  
LOW-VOLTAGE  
LIGHT-TO-DIGITAL CONVERTER  
TAOS066J MAY 2007  
When an SMBus Block Write or Block Read is initiated (see description of COMMAND Register), the byte  
following the COMMAND byte is ignored but is a requirement of the SMBus specification. This field contains  
the byte count (i.e. the number of bytes to be transferred). The TSL2562 (SMBus) device ignores this field and  
extracts this information by counting the actual number of bytes transferred before the Stop condition is  
detected.  
2
2
When an I C Write or I C Read (Combined Format) is initiated, the byte count is also ignored but follows the  
2
SMBus protocol specification. Data bytes continue to be transferred from the TSL2563 (I C) device to Master  
until a NACK is sent by the Master.  
The data formats supported by the TSL2562 and TSL2563 devices are:  
2
D
D
Master transmitter transmits to slave receiver (SMBus and I C):  
The transfer direction in this case is not changed.  
Master reads slave immediately after the first byte (SMBus only):  
At the moment of the first acknowledgment (provided by the slave receiver) the master transmitter  
becomes a master receiver and the slave receiver becomes a slave transmitter.  
2
D
Combined format (SMBus and I C):  
During a change of direction within a transfer, the master repeats both a START condition and the slave  
address but with the R/W bit reversed. In this case, the master receiver terminates the transfer by  
generating a NACK on the last byte of the transfer and a STOP condition.  
For a complete description of SMBus protocols, please review the SMBus Specification at  
2
2
http://www.smbus.org/specs. For a complete description of I C protocols, please review the I C Specification  
at http://www.semiconductors.philips.com.  
1
7
1
1
A
X
8
1
1
S
Slave Address  
Wr  
Data Byte  
A
X
P
A
Acknowledge (this bit position may be 0 for an ACK or 1 for a NACK)  
P
Stop Condition  
Rd  
S
Read (bit value of 1)  
Start Condition  
Sr  
Wr  
X
Repeated Start Condition  
Write (bit value of 0)  
Shown under a field indicates that that field is required to have a value of X  
... Continuation of protocol  
Master-to-Slave  
Slave-to-Master  
2
Figure 7. SMBus and I C Packet Protocol Element Key  
Copyright E 2007, TAOS Inc.  
The LUMENOLOGY r Company  
r
r
10  
www.taosinc.com