TSL2562, TSL2563
LOW-VOLTAGE
LIGHT-TO-DIGITAL CONVERTER
TAOS066J − MAY 2007
PARAMETER MEASUREMENT INFORMATION
t
t
(R)
t
(F)
(LOW)
V
IH
SCL
SDA
V
IL
t
t
t
(HDSTA)
(HIGH)
(SUSTA)
t
t
t
(SUSTO)
t
(BUF)
(HDDAT)
(SUDAT)
V
V
IH
IL
P
S
S
P
Stop
Condition
Start
Condition
Start
Stop
t
(LOWSEXT)
SCL
SCL
ACK
ACK
t
t
t
(LOWMEXT)
(LOWMEXT)
(LOWMEXT)
SCL
SDA
Figure 1. Timing Diagrams
1
9
1
9
SCL
SDA
A6 A5
A4
A3
A2 A1 A0 R/W
D7 D6
D5 D4 D3 D2
D1 D0
Start by
Master
ACK by
TSL256x
ACK by Stop by
TSL256x Master
Frame 1 SMBus Slave Address Byte
Frame 2 Command Byte
Figure 2. Example Timing Diagram for SMBus Send Byte Format
1
9
1
9
SCL
SDA
A6 A5
A4
A3
A2 A1 A0 R/W
D7 D6
D5 D4 D3 D2
D1 D0
Start by
Master
ACK by
TSL256x
NACK by Stop by
Master Master
Frame 1 SMBus Slave Address Byte
Frame 2 Data Byte From TSL256x
Figure 3. Example Timing Diagram for SMBus Receive Byte Format
Copyright E 2007, TAOS Inc.
The LUMENOLOGY r Company
r
r
www.taosinc.com
7
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
