TSL2562, TSL2563
LOW-VOLTAGE
LIGHT-TO-DIGITAL CONVERTER
TAOS066J − MAY 2007
AC Electrical Characteristics, VDD = 3 V, TA = 25ꢁ C (unless otherwise noted)
†
PARAMETER
Conversion time
TEST CONDITIONS
MIN
TYP
MAX
UNIT
t
12
100
400
ms
(CONV)
f
t
Clock frequency
400
kHz
(SCL)
(BUF)
Bus free time between start and stop condition
1.3
0.6
μs
Hold time after (repeated) start condition. After
this period, the first clock is generated.
t
μs
(HDSTA)
t
t
t
t
t
t
t
t
t
Repeated start condition setup time
Stop condition setup time
Data hold time
0.6
0.6
0
μs
μs
μs
ns
μs
μs
ms
ns
ns
pF
(SUSTA)
(SUSTO)
(HDDAT)
(SUDAT)
(LOW)
(HIGH)
(TIMEOUT)
F
0.9
Data setup time
100
1.3
0.6
25
SCL clock low period
SCL clock high period
Detect clock/data low timeout (SMBus only)
Clock/data fall time
35
300
300
10
Clock/data rise time
R
C
Input pin capacitance
i
†
Specified by design and characterization; not production tested.
Copyright E 2007, TAOS Inc.
The LUMENOLOGY r Company
r
r
6
www.taosinc.com
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
