TCS3404, TCS3414
DIGITAL COLOR SENSORS
TAOS137A − APRIL 2011
Control Register (00h)
The CONTROL register contains two bits and is primarily used to power the TCS3404/14 device up and down
as shown in Table 4.
Table 4. Control Register
7
Resv
0
6
Resv
0
5
Resv
0
4
3
Resv
0
2
Resv
0
1
ADC_EN
0
0
CONTROL
00h
ADC_VALID
0
POWER
0
Reset Value:
FIELD
Resv
BIT
7:6
5
DESCRIPTION
Reserved. Write as 0.
Reserved. Write as 0.
Resv
ADC_VALID
Resv
4
ADC valid. This read-only field indicates that the ADC channel has completed an integration cycle.
Reserved. Write as 0.
3:2
ADC enable. This field enables the four ADC channels to begin integration. Writing a 1 activates the ADC
channels, and writing a 0 disables the ADCs.
ADC_EN
POWER
1
0
Power on. Writing a 1 powers on the device, and writing a 0 turns it off.
NOTES: 1. Both ADC_EN and POWER must be asserted before the ADC channels will operate correctly.
2. INTEG_MODE and TIME/COUNTER fields in the Timing Register (01h) should be written before ADC_EN is asserted.
3. If a value of 03h is written, the value returned during a read cycle will be 03h. This feature can be used to verify that the device is
communicating properly.
4. During writes and reads, the POWER bit is overridden and the oscillator is enabled, independent of the state of POWER.
Copyright E 2011, TAOS Inc.
The LUMENOLOGY r Company
r
r
www.taosinc.com
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