DS90UB913Q, DS90UB914Q
SNLS420B –JULY 2012–REVISED APRIL 2013
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t
TCP
PCLK
DINn
V
DDIO
/2
V
/2
V
V
/2
DDIO
DDIO
t
t
DIH
DIS
DDIO
Setup
Hold
V
/2
V
/2
DDIO
DDIO
0V
Figure 12. Serializer Setup/Hold Times
VDDIO/2
PDB
PCLK
t
PLD
Output Active
TRI-STATE
TRI-STATE
D
±
OUT
Figure 13. Serializer PLL Lock Time
SYMBOL N
VDDIO/2
SYMBOL N+1
SYMBOL N+2
SYMBOL N+3
D
IN
t
SD
PCLK
SYMBOL N-4
SYMBOL N-3
SYMBOL N-2
SYMBOL N-1
SYMBOL N
0V
DOUT+-
Figure 14. Serializer Delay
VDDIO/2
PDB
t
DDLT
R
IN±
LOCK
TRI-STATE
VDDIO/2
Figure 15. Deserializer Data Lock Time
80%
20%
80%
Deserializer
20%
8 pF
lumped
t
t
CHL
CLH
Figure 16. Deserializer LVCMOS Output Load and Transition Times
18
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