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CC2510F8RSP 参数 Datasheet PDF下载

CC2510F8RSP图片预览
型号: CC2510F8RSP
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗的SoC (系统级芯片)与MCU,存储器, 2.4 GHz射频收发器和USB控制器 [Low-Power SoC (System-on-Chip) with MCU, Memory, 2.4 GHz RF Transceiver, and USB Controller]
分类和应用: 存储射频控制器
文件页数/大小: 244 页 / 2899 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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C2510Fx / CC2511Fx  
flag for BCD operations, Register Select bits,  
Overflow flag, and Parity flag. Two bits in PSW  
are uncommitted and can be used as user-  
defined status flags.  
PSW (0xD0) – Program Status Word  
Bit  
Name  
Reset  
R/W  
Description  
7
CY  
0
R/W  
Carry flag. Set to 1 when the last arithmetic operation resulted in a carry  
(during addition) or borrow (during subtraction), otherwise cleared to 0 by all  
arithmetic operations.  
6
AC  
0
R/W  
Auxiliary carry flag for BCD operations. Set to 1 when the last arithmetic  
operation resulted in a carry into (during addition) or borrow from (during  
subtraction) the high order nibble, otherwise cleared to 0 by all arithmetic  
operations.  
5
F0  
0
R/W  
R/W  
User-defined, bit-addressable  
4:3  
RS[1:0]  
00  
Register bank select bits. Selects which set of R7- R0registers to use from  
four possible register banks in DATA space.  
00  
01  
10  
11  
Bank 0, 0x00 – 0x07  
Bank 1, 0x08 – 0x0F  
Bank 2, 0x10 – 0x17  
Bank 3, 0x18 – 0x1F  
2
OV  
0
R/W  
Overflow flag, set by arithmetic operations. Set to 1 when the last arithmetic  
operation resulted in a carry (addition), borrow (subtraction), or overflow  
(multiply or divide). Otherwise, the bit is cleared to 0 by all arithmetic  
operations.  
1
0
F1  
P
0
0
R/W  
R/W  
User-defined, bit-addressable  
Parity flag, parity of accumulator set by hardware to 1 if it contains an odd  
number of 1’s, otherwise it is cleared to 0  
11.3.4 Accumulator  
data transfer and other instructions. The  
mnemonic for the accumulator (in instructions  
involving the accumulator) refers to A instead  
of ACC.  
ACC is the accumulator. This is the source  
and destination of most arithmetic instructions,  
ACC (0xE0) – Accumulator  
Bit  
Name  
Reset  
R/W  
Description  
7:0  
ACC[7:0]  
0x00  
R/W  
Accumulator  
11.3.5 B Register  
purposes it may be used as a scratch-pad  
register to hold temporary data.  
The B register is used as the second 8-bit  
argument during execution of multiply and  
divide instructions. When not used for these  
B (0xF0) – B Register  
Bit  
Name  
Reset  
R/W  
Description  
7:0  
B[7:0]  
0x00  
R/W  
B register. Used in MUL and DIV instructions.  
11.3.6 Stack Pointer  
copies the byte into the stack. The Stack  
Pointer is initialized to 0x07 after a reset and it  
is incremented once to start from location  
0x08, which is the first register (R0) of the  
The stack resides in DATA memory space and  
grows upwards. The PUSH instruction first  
increments the Stack Pointer (SP) and then  
SWRS055D  
Page 53 of 243  
 
 
 
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