C2510Fx / CC2511Fx
11.3 CPU Registers
This section describes the internal registers
found in the CPU.
The data pointer select bit, bit 0 in the Data
Pointer Select register DPS, chooses which
data pointer to use during the execution of an
instruction that uses the data pointer, e.g. in
one of the above instructions.
11.3.1 Data Pointers
The CC2510Fx/CC2511Fx has two data pointers,
DPTR0 and DPTR1, to accelerate the
movement of data blocks to/from memory. The
data pointers are generally used to access
CODE or XDATA space e.g.
The data pointers are two bytes wide
consisting of the following SFRs:
• DPTR0 – DPH0:DPL0
• DPTR1 – DPH1:DPL1
MOVC A,@A+DPTR
MOV A,@DPTR.
DPH0 (0x83) – Data Pointer 0 High Byte
Bit
Name
Reset
R/W
Description
7:0
DPH0[7:0]
0
R/W
Data pointer 0, high byte
DPL0 (0x82) – Data Pointer 0 Low Byte
Bit
Name
Reset
R/W
Description
7:0
DPL0[7:0]
0
R/W
Data pointer 0, low byte
DPH1 (0x85) – Data Pointer 1 High Byte
Bit
Name
Reset
R/W
Description
7:0
DPH1[7:0]
0
R/W
Data pointer 1, high byte
DPL1 (0x84) – Data Pointer 1 Low Byte
Bit
Name
Reset
R/W
Description
7:0
DPL1[7:0]
0
R/W
Data pointer 1, low byte
DPS (0x92) – Data Pointer Select
Bit
7:1
0
Name
Reset
R/W
R/W
R/W
Description
Not used
0
0
DPS
Data pointer select
0
1
DPTR0
DPTR1
11.3.2 Registers R0 - R7
bank to be used is selected through the
Program Status Word PSW.RS[1:0].
The CC2510Fx/CC2511Fx provides four register
banks of eight registers each. These register
banks are in the DATA memory space at
addresses 0x00-0x07, 0x08-0x0F, 0x10-0x17
and 0x18-0x1F and are mapped to address
range 0xFF00 to 0xFF1F in the unified
memory space. Each register bank contains
the eight 8-bit register R0 - R7. The register
11.3.3 Program Status Word
The Program Status Word (PSW) contains
several bits that show the current state of the
CPU. The Program Status Word is accessible
as an SFR and it is bit-addressable. The PSW
register contains the Carry flag, Auxiliary Carry
SWRS055D
Page 52 of 243
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