CC2430
Peripherals : I/O ports
13.4.8
32.768 kHz XOSC input
Ports P2_3 and P2_4 are used to connect an
external 32.768 kHz crystal. These port pins
will be used by the 32.768 kHz crystal
oscillator when CLKCON.OSC32K is low,
regardless of register settings. The port pins
will be set in analog mode when
CLKCON.OSC32Kis low.
13.4.9
Radio Test Output Signals
For debug purposes and to some degree
CC2420 pin compability, the RFSTATUS.SFD,
RFSTATUS.FIFO, RFSTATUS.FIFOP and
RFSTATUS.CCAbits can be output onto P1.7 –
P1.4 I/O pins to monitor the status of these
signals. These test output signals are selected
by the IOCFG0, IOCFG1 and IOCFG2
registers.
•
•
•
•
P1.4 – FIFO
P1.5 – FIFOP
P1.6 – SFD
P1.7 – CCA
Configuring this mode has precedence over
other settings in the IOC, and these pins will
be assigned the above signals and forced to
be outputs.
The debug signals are output to the following
I/O pins:
13.4.10 I/O registers
The registers for the I/O ports are described in
this section. The registers are:
• P1DIRPort 1 direction register
• P2DIRPort 2 direction register
• P0INPPort 0 input mode register
• P1INPPort 1 input mode register
• P2INPPort 2 input mode register
• P0IFGPort 0 interrupt status flag register
• P1IFGPort 1 interrupt status flag register
• P2IFGPort 2 interrupt status flag register
• PICTLInterrupt mask and edge register
• P1IENPort 1 interrupt mask register
• P0Port 0
• P1Port 1
• P2Port 2
• PERCFGPeripheral control register
• ADCCFGADC input configuration register
• P0SELPort 0 function select register
• P1SELPort 1 function select register
• P2SELPort 2 function select register
• P0DIRPort 0 direction register
P0 (0x80) – Port 0
Bit
Name
Reset
R/W
Description
7:0
0xFF
R/W
Port 0. General purpose I/O port. Bit-addressable.
P0[7:0]
P1 (0x90) – Port 1
Bit
Name
Reset
R/W
Description
7:0
0xFF
R/W
Port 1. General purpose I/O port. Bit-addressable.
P1[7:0]
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 82 of 211
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