CC2430
Peripherals : Power Management and clocks
13.1.1.2
PM1
In PM1, the high-frequency oscillators are
powered down (32MHz XOSC and 16MHz RC
OSC). The voltage regulator and the enabled
32 kHz oscillator is on. When PM1 is entered,
a power down sequence is run. When the
device is taken out of PM1 to PM0, the high-
frequency oscillators are started. The device
will run on the 16MHz RC oscillator until
32MHz is selected as source by SW.
PM1 is used when the expected time until a
wakeup event is relatively short (less than 3
ms) since PM1 uses a fast power down/up
sequence.
13.1.1.3
PM2
PM2 has the second lowest power
consumption. In PM2 the power-on reset,
external interrupts, 32.768 kHz oscillator and
sleep timer peripherals are active. I/O pins
retain the I/O mode and output value set
before entering PM2. All other internal circuits
are powered down. The voltage regulator is
also turned off. When PM2 is entered, a power
down sequence is run.
PM2 is typically entered when using the sleep
timer as the wakeup event, and also combined
with external interrupts. PM2 should typically
be choosen, compared to PM1, when sleep
times exeeds 3 ms. Using less sleep time will
not reduce system power consumption
compared to using PM1.
13.1.1.4
PM3
PM3 is used to achieve the operating mode
with the lowest power consumption. In PM3 all
internal circuits that are powered from the
voltage regulator are turned off (basically all
digital modules, the only exeption are interrupt
detection and POR level sensing). The internal
voltage regulator and all oscillators are also
turned off.
PM3. A reset condition or an enabled external
IO interrupt event will wake the device up and
place it into PM0 (an external interrupt will
start from where it entered PM3, while a reset
returns to start of program execution). The
content of RAM and registers is partially
preserved in this mode (see section 13.1.6).
PM3 uses the same power down/up sequence
as PM2.
Reset (POR or external) and external I/O port
interrupts are the only functions that are
operating in this mode. I/O pins retain the I/O
mode and output value set before entering
PM3 is used to achieve ultra low power
consumption when waiting for an external
event.
13.1.2
Power Management Control
The required power mode is selected by the
MODE bits in the SLEEP control register.
Setting the SFR register PCON.IDLE bit after
setting the MODE bits, enters the selected
sleep mode.
An enabled interrupt from port pins or sleep
timer or a power-on reset will wake the device
from other power modes and bring it into PM0
by resetting the MODEbits.
13.1.3
Power Management Registers
section describes the Power
This
their previous values when entering PM2 or
PM3 unless otherwise stated.
Management registers. All register bits retain
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 66 of 211
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
