CC2430
Radio : Radio Registers
IOCFG1 (0xDF50)
Bit
Name
Reset
R/W
Description
Reserved, read as 0.
7
6
5
-
0
0
0
R0
CCA is output on P1.7 when this bit is 1
OE_CCA
IO_CCA_POL
R/W
R/W
Polarity of the IO_CCA signal. This bit is xor’ed with the
internal CCA signal.
Multiplexer setting for the CCA signal. Must be 0x00 in
order to output the CCA status.
4:0
IO_CCA_SEL
00000
R/W
IOCFG2 (0xDF51)
Bit
Name
Reset
R/W
Description
Reserved, read as 0.
7
6
5
-
0
0
0
R0
SFD is output on P1.6 when this bit is 1
OE_SFD
IO_SFD_POL
R/W
R/W
Polarity of the IO_SFD signal. This bit is xor’ed with the
internal SFD signal.
Multiplexer setting for the SFD signal. Must be 0x00 in order
to output the SFD status
4:0
IO_SFD_SEL
00000
R/W
IOCFG3 (0xDF52)
Bit
Name
Reset
R/W
Description
Reserved, read as 0.
7:6
5:4
-
00
00
R0
Configures the HSSD interface. Only the first 4 settings
(compared to CC2420) are used.
HSSD_SRC
R/W
00 : Off
01 : Output AGC status (gain setting/peak detector
status/accumulator value)
10 : Output ADC I and Q values
11 : Output I/Q after digital down mix and channel filtering
FIFOP is output on P1.5 when this bit is 1.
3
2
OE_FIFOP
0
0
R/W
R/W
Polarity of the IO_FIFOP signal. This bit is xor’ed with the
internal FIFOP signal
IO_FIFOP_POL
FIFO is output on P1.4 when this bit is 1
1
0
OE_FIFO
0
0
R/W
R/W
Polarity of the IO_FIFO signal. This bit is xor’ed with the
internal FIFO signal
IO_FIFO_POL
RXFIFOCNT (0xDF53)
Bit
Name
Reset
R/W
Description
Number of bytes in the RX FIFO
7:0
RXFIFOCNT[7:0]
0x00
R
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 199 of 211
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
