CC2430
Radio : Radio Registers
AGCCTRLH (0xDF26)
Bit
Name
Reset
R/W
Description
Use the VGA_GAIN value during RX instead of the AGC
value.
7
VGA_GAIN_OE
0
R/W
When written, VGA manual gain override value; when read,
the currently used VGA gain setting.
6:0
VGA_GAIN[6:0]
0x7F
R/W
AGCCTRLL (0xDF27)
Bit
Name
Reset
R/W
Description
Reserved, read as 0.
7:4
3:2
-
0
R0
LNA / Mixer Gain mode override setting
LNAMIX_GAINMODE_O
[1:0]
00
R/W
00 : Gain mode is set by AGC algorithm
01 : Gain mode is always low-gain
10 : Gain mode is always med-gain
11 : Gain mode is always high-gain
Status bit, defining the currently selected gain mode
selected by the AGC or overridden by the
LNAMIX_GAINMODE_O setting. Note that this value is
updated by HW and may have changed between reset and
when read.
1:0
LNAMIX_GAINMODE[1:0] 00
R
FSMSTATE (0xDF39)
Bit
Name
Reset
R/W
Description
Reserved, read as 0.
7:6
5:0
-
0
R0
R
Gives the current state of the FIFO and Frame Control
(FFCTRL) finite state machine.
FSM_FFCTRL_STATE[5:0 -
]
ADCTSTH (0xDF3A)
Bit
Name
Reset
R/W
Function
ADC Clock Disable
7
ADC_CLOCK_DISABLE
0
R/W
0 : Clock enabled when ADC enabled
1 : Clock disabled, even if ADC is enabled
Returns the current ADC I-branch value.
6:0
ADC_I[6:0]
-
R
ADCTSTL (0xDF3B)
Bit
Name
Reset
R/W
Function
Reserved, read as 0.
7
-
0
-
R0
R
Returns the current ADC Q-branch value.
6:0
ADC_Q[6:0]
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 196 of 211
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
