CC2430
Peripherals : MAC Timer (Timer2)
13.7 MAC Timer (Timer2)
The MAC Timer is mainly used to provide
timing for 802.15.4 CSMA-CA algorithms and
for general timekeeping in the 802.15.4 MAC
layer. When the MAC Timer is used together
with the Sleep Timer described in section 13.9,
the timing function is provided even when the
system enters low-power modes.
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•
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8-bit timer compare function
20-bit overflow count
20-bit overflow count compare function
Start of Frame Delimiter capture function.
Timer start/stop synchronous with 32.768
kHz clock and timekeeping maintained by
Sleep Timer.
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Interrupts generated on compare and
overflow
DMA trigger capability
The main features of the MAC Timer are the
following:
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16-bit
symbol/frame period: 16µs/320µs
Adjustable period with accuracy 31.25 ns
timer
up-counter
providing
13.7.1
Timer Operation
This section describes the operation of the
timer.
13.7.1.1
General
After a reset the timer is in the timer IDLE
mode where it is stopped. The timer starts
running when T2CNF.RUN is set to 1. The
timer will then enter the timer RUN mode. The
entry is either immediate or it is performed
synchronous with the 32 kHz clock. See
Once the timer is running in RUN mode, it can
be stopped by writing a 0 to T2CNF.RUN. The
timer will then enter the timer IDLE mode. The
stopping of the timer is performed either
immediately or it is performed synchronous
with the 32 kHz clock
section 13.7.4 for
a
description of the
synchronous start and stop mode.
13.7.1.2 Up Counter
The MAC Timer contains a 16-bit timer, which
increments during each clock cycle.
13.7.1.3
Timer overflow
When the timer is about to count to a value
that is equal to or greater than the timer period
set by registers T2CAPHPH:T2CAPLPL, a
timer overflow occurs. When the timer overflow
occurs, the timer is set to the difference
between the value it is about to count to and
the timer period, e.g. if the next value of the
timer would be 0x00FF and the timer period is
0x00FF then the timer is set to 0x000. If the
overflow interrupt mask bit T2PEROF2.PERIM
is 1, an interrupt request is generated. The
interrupt flag bit T2CNF.PERIF is set to 1
regardless of the interrupt mask value.
13.7.1.4
Timer delta increment
The timer period may be adjusted once during
a timer period by writing a timer delta value.
When a timer delta value is written to the
registers T2THD:T2TLD, the 16-bit timer halts
at its current value and a delta counter starts
counting. The delta counter starts counting
from the delta value written, down to zero.
Once the delta counter reaches zero, the 16-
bit timer starts counting again.
The delta counter decrements by the same
rate as the timer. When the delta counter has
reached zero it will not start counting again
until the delta value is written once again. In
this way a timer period may be increased by
the delta value in order to make adjustments
to the timer overflow events over time.
13.7.1.5
Timer Compare
A timer compare occurs when the timer is
about to count to a value that is equal or
greater than the 8-bit compare value held in
the T2CMP register. Note that the compare
value is only 8 bits so the compare is made
between the compare value and either the
most significant byte or the least significant
byte of the timer. The selection of which part of
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 110 of 211
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