CC2430
Peripherals : 16-bit timer, Timer1
FFFFh
0000h
OVFL
OVFL
Figure 20: Free-running mode
13.6.4
Modulo Mode
When the timer operates in modulo mode the
16-bit counter starts at 0x0000 and increments
at each active clock edge. When the counter
reaches the terminal count value T1CC0
(overflow), held in registers T1CC0H:T1CC0L,
the counter is reset to 0x0000 and continues to
increment. Both the IRCON.T1IFand the flag
T1CTL.OVFIF flag are set when the terminal
count value is reached. An interrupt request is
generated if the corresponding interrupt mask
bit TIMIF.OVFIM is set together with
IEN1.T1EN. The modulo mode can be used
for applications where a period other then
0xFFFF is required. The counter operation is
shown in Figure 21.
T1CC0
0000h
OVFL
OVFL
Figure 21: Modulo mode
13.6.5
Up/down Mode
In the up/down timer mode, the counter
repeatedly starts from 0x0000 and counts up
until the value held in T1CC0H:T1CC0L is
reached and then the counter counts down
until 0x0000 is reached as shown in Figure 22.
This timer mode is used when symmetrical
output pulses are required with a period other
implementation of centre-aligned PWM output
applications. Both the IRCON.T1IF and the
T1CTL.OVFIF flag are set when the counter
value reaches 0x0000 in the up/down mode.
An interrupt request is generated if the
corresponding
TIMIF.OVFIM
IEN1.T1EN.
interrupt
is set
mask
together
bit
with
than
0xFFFF,
and
therefore
allows
CC2430 Data Sheet (rev. 2.1) SWRS036F
Page 100 of 211
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
