W681308
XXXX PRODUCT DESCRIPTION
The main use of the Watchdog timer is as a system monitor. This is important in real-time control applications. In case of
some power glitches or electro-magnetic interference, the processor may begin to execute errant code. If this is left
unchecked the entire system may crash. Using the watchdog timer interrupt during software development will allow the user
to select ideal watchdog reset locations. The code is first written without the watchdog interrupt or reset. Then the watchdog
interrupt is enabled to identify code locations where interrupt occurs. The user can now insert instructions to reset the
watchdog timer which will allow the code to run without any watchdog timer interrupts. Now the watchdog timer reset is
enabled and the watchdog interrupt may be disabled. If any errant code is executed now, then the reset watchdog timer
instructions will not be executed at the required instants and watchdog reset will occur.
Watchdog
Interval
Number of
Clocks
WD1
0
WD0
0
Time@12MHz
699.05 ms
Time@24MHz
349.53 ms
Time@48MHz
174.76 ms
223
225
226
228
8388608
33554462
67108864
268435456
0
1
1
1
0
1
2796.20 ms
5592.41 ms
22369.62 ms
1398.10 ms
2796.20 ms
11184.81 ms
699.05 ms
1398.10 ms
5592.41 ms
Table 6 Time-Out Values For Watchdog Timer
The Watchdog timer will be disabled by a power-on/fail reset. The Watchdog timer reset does not disable the watchdog timer,
but will restart it.
NOTE: In general, software should restart the timer to put it into a known state.
D8H
Bit 7
-
Bit 6
POR
Bit 5
-
Bit 4
-
Bit 3
Bit 2
Bit 1
Bit 0
WDCON
WDIF
WTRF
EWT
RWT
External
Reset
0
x
0
x
0
x
x
0
Table 7 Watchdog Control WDCON SFR
Control Bit
POR
Name
Function
Hardware will set this flag on a power up condition. This flag can be read or written
by software. A write by software is the only way to clear this bit once it is set.
Power-on Reset Flag
This bit is set by hardware to indicate that the time-out period has elapsed and
invoke watch dog timer interrupt if enabled(EWDI=1). This bit must be cleared by
software.
Watchdog Timer
Interrupt Flag
WDIF
Hardware will set this bit when the watchdog timer causes a reset. Software can
read it but must clear it manually. A power-fail reset will also clear the bit. This bit
helps software in determining the cause of a reset. If EWT = 0, the watchdog timer
will have no affect on this bit.
Watchdog Timer
Reset Flag
WTRF
26
Rev1.2
NUVOTEM TALEMA [ NUVOTEM TALEMA ]
